Stl Instructions; E.4 Stl Instructions - Siemens SIMATIC S7 System Manual

References

E.4 STL instructions

Clock A Direction
/ Clock B
HSC5 I1.0 I1.1
S model CPUs: SR20, ST20, SR30, ST30, SR40, ST40, SR60, and ST60
1
C model CPUs: CR20s, CR30s, CR40s, and CR60s
2
E.4

STL instructions

Instructions
The STL instruction names and descriptions are shown in the tables below. See the chapter
on program instructions (Page 169) for the LAD and FBD instructions.
Boolean instructions
STL
LD bit
LDI bit
LDN bit
LDNI bit
A bit
AI bit
AN bit
ANI bit
O bit
OI bit
ON bit
ONI bit
LDBx IN1, IN2
ABx IN1, IN2
OBx IN1, IN2
LDWx IN1, IN2
834
Reset Single phase / Dual phase maximum
clock / input rate
C model CPUs:
n/a
•
I1.3 S model CPUs:
30 kHz
•
C model CPUs:
n/a
•
Description
Load
Load Immediate
Load Not
Load Not Immediate
AND
AND Immediate
AND Not
AND Not Immediate
OR
OR Immediate
OR Not
OR Not Immediate
Load result of Byte Compare
IN1 (x:<, <=,=, >=, >, <>I) IN2
AND result of Byte Compare
IN1 (x:<, <=,=, >=, >, <>) IN2
OR result of Byte Compare
IN1 (x:<, <=,=, >=, >, <>) IN2
Load result of Word Compare
IN1 (x:<, <=,=, >=, >, <>) IN2
AB quadrature phase maximum
clock / input rate
C model CPUs:
n/a
•
S model CPUs
20 kHz = Maximum 1x count rate
•
80 kHz = Maximum 4x count rate
•
C model CPUs:
n/a
•
System Manual, V2.3, 07/2017, A5E03822230-AF
S7-200 SMART