Siemens SIMATIC S7 System Manual page 842

References
E.5 Memory ranges and features
Description
Sequential control relays (S)
Accumulator registers
Jumps/Labels
Call/Subroutine
Interrupt routines
Positive/negative transitions
PID control loops
Ports
LB60 to LB63 are reserved by STEP 7-Micro/WIN SMART when programming in LAD or FBD.
1
The CPU models CPU CR20s, CPU CR30s, CPU CR40s, and CPU CR60s have no Ethernet port. These CPUs do not
2
support any functions related to the use of Ethernet communications.
842
CPU CR20s, CPU SR20,
CPU CR30s, CPU ST20
CPU CR40s,
CPU CR60s
S0.0 to S31.7 S0.0 to S31.7
AC0 to AC3 AC0 to AC3
0 to 255 0 to 255
0 to 127 0 to 127
0 to 127 0 to 127
1024 1024
0 to 7 0 to 7
Integrated Ethernet pro-
RS485 port gramming
(Port 0) port, Integrat-
2
ed RS485 port
(Port 0),
CM01 Signal
Board (SB)
RS232/RS485
port (Port 1)
CPU SR30, CPU SR40,
CPU ST30 CPU ST40
S0.0 to S31.7 S0.0 to S31.7
AC0 to AC3 AC0 to AC3
0 to 255 0 to 255
0 to 127 0 to 127
0 to 127 0 to 127
1024 1024
0 to 7 0 to 7
Ethernet pro- Ethernet pro-
gramming gramming port,
port, Integrat- Integrated
ed RS485 port RS485 port
(Port 0), (Port 0),
CM01 Signal CM01 Signal
Board (SB) Board (SB)
RS232/RS485 RS232/RS485
port (Port 1) port (Port 1)
System Manual, V2.3, 07/2017, A5E03822230-AF
CPU SR60,
CPU ST60
S0.0 to S31.7
AC0 to AC3
0 to 255
0 to 127
0 to 127
1024
0 to 7
Ethernet pro-
gramming port,
Integrated
RS485 port
(Port 0),
CM01 Signal
Board (SB)
RS232/RS485
port (Port 1)
S7-200 SMART