Siemens SIMATIC S7 System Manual page 696

Technical specifications
A.2 S7-200 SMART CPUs
Technical data
High- Total
speed
Single phase
counters
A/B phase
Pulse outputs
2
Pulse catch inputs
Cyclic interrupts
Edge interrupts
Memory card
Real time clock accuracy
Real time clock retention
time
You can configure areas of V memory, M memory, C memory (current values), and portions of T memory (current val-
1
ues on retentive times) to be retentive, up to the specified maximum amount.
The specified maximum pulse frequency is possible only for CPU models with transistor outputs. Pulse output operation
2
is not recommended for CPU models with relay outputs.
Table A- 25 Performance
Type of instruction
Boolean
Move Word
Real math
Table A- 26 User program elements supported
Element
POUs Type/quantity
Nesting depth
Accumulators Quantity
Timers Type/quantity
Counters Quantity
696
CPU ST30 DC/DC/DC
6
5 at 200 kHz
1 at 30 kHz
3 at 100 kHz
1 at 20 kHz
3 at 100 kHz
12
2 at 1 ms resolution
4 rising and 4 falling (6 and 6
with optional signal board)
microSDHC Card (optional)
+/- 120 seconds/month
7 days typ./6 days min. at 25
°C (maintenance-free Super
Capacitor)
Execution speed
150 ns instruction
1.2 μs/instruction
3.6 μs/instruction
Description
Main program: 1
Subroutines: 128 (0 to 127)
Interrupt routines: 128 (0 to 127)
From main program: 8 subroutine levels
From interrupt routine: 4 subroutine levels
4
Non-retentive (TON, TOF): 192
Retentive (TONR): 64
256
CPU SR30 AC/DC/Relay
6
5 at 200 kHz
1 at 30 kHz
3 at 100 kHz
1 at 20 kHz
--
12
2 at 1 ms resolution
4 rising and 4 falling (6 and 6
with optional signal board)
microSDHC Card (optional)
+/- 120 seconds/month
7 days typ./6 days min. at 25
°C (maintenance-free Super
Capacitor)
System Manual, V2.3, 07/2017, A5E03822230-AF
CPU CR30s AC/DC/Relay
4
4 at 100 kHz
2 at 50 kHz
Not available
Not available
2 at 1 ms resolution
4 rising and 4 falling
Not available
Not available
Not available
S7-200 SMART