Siemens SIMATIC S7 System Manual page 608

Open loop motion control
12.5 Configuring an Axis of Motion
Configuring the input pin locations
You can program inputs related to motion control, to include STP, LMT-, LMT+, RPS, TRIG,
and ZP, with a configuration in SDB0.
Table 12- 5
Pin definition for inputs
LMT+, LMT-, STP, RPS, TRIG Input pin 0 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
ZP HSC
Note
After you configure an input to a specific function (for example, RPS) for a particular Axis of
Motion, you cannot use that input for any other Axis of Motion or for any other input, counter,
or interrupt function.
608
STP, RPS, LMT+, LMT-, TRIG, and ZP pin locations
Description
input (I0.0).
Input pin 1 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.1).
Input pin 2 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.2).
Input pin 3 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.3).
Input pin 4 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.4).
Input pin 5 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.5).
Input pin 6 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.6).
Input pin 7 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I0.7).
Input pin 8 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I1.0).
Input pin 9 of the CPU can act as the LMT+, LMT-, STP, RPS, TRIG
input (I1.1).
Input pin 10 of the CPU can act as the LMT+, LMT-, STP, RPS,
TRIG input (I1.2).
Input pin 11 of the CPU can act as the LMT+, LMT-, STP, RPS,
TRIG input (I1.3).
HSC0 of the CPU acts as the ZP input (I0.0).
HSC1 of the CPU acts as the ZP input (I0.1).
HSC2 of the CPU acts as the ZP input (I0.2).
HSC3 of the CPU acts as the ZP input (I0.3).
HSC4 of the CPU acts as the ZP input (I0.6).
HSC5 of the CPU acts as the ZP input (I1.0).
System Manual, V2.3, 07/2017, A5E03822230-AF
S7-200 SMART