Cpu St30, Cpu Sr30, And Cpu Cr30S; General Specifications And Features - Siemens SIMATIC S7 System Manual

A.2.2

CPU ST30, CPU SR30, and CPU CR30s

A.2.2.1

General specifications and features

General specifications and features of the CPU ST30, CPU SR30 and CPU CR30s
Table A- 23 General specifications
Technical data
Article number
Dimensions W x H x D
(mm)
Weight
Power dissipation
Current available (EM
bus)
Current available (24 V
DC)
Digital input current
consumption (24 V DC)
Table A- 24 CPU features
Technical data
User Program
memory
1
User data (V)
Retentive
On-board digital I/O
Process image
Analog image
Bit memory (M)
Temporary (local) memory
(L)
Sequential control relays
(S)
Expansion modules
expansion
Signal board expansion
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
CPU ST30 DC/DC/DC
6ES7288-1ST30-0AA0
110 x 100 x 81
375 g
12 W
1400 mA max. (5 V DC)
300 mA max. (sensor power)
4 mA/ input used
CPU ST30 DC/DC/DC
18 Kbytes
12 Kbytes
10 Kbytes max.
1
18 inputs/12 outputs
256 bits of inputs (I) / 256 bits
of outputs (Q)
56 words of inputs (AI) / 56
words of outputs (AQ)
256 bits
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
256 bits
6
1 max.
CPU SR30 AC/DC/Relay
6ES7288-1SR30-0AA0
110 x 100 x 81
435 g
14 W
1400 mA max. (5 V DC)
300 mA max. (sensor power)
4 mA/ input used
CPU SR30 AC/DC/Relay
18 Kbytes
12 Kbytes
10 Kbytes max.
1
18 inputs/12 outputs
256 bits of inputs (I) / 256 bits
of outputs (Q)
56 words of inputs (AI) / 56
words of outputs (AQ)
256 bits
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
256 bits
6
1 max.
Technical specifications
A.2 S7-200 SMART CPUs
CPU CR30s AC/DC/Relay
6E88288-1CR30-0AA1
110 x 100 x 81
424 g
7 w
Not available
Not available
4 mA/ input used
CPU CR30s AC/DC/Relay
12 Kbytes
8 Kbytes
2 Kbytes max.
1
18 inputs/12 outputs
256 bits of inputs (I) / 256 bits
of outputs (Q)
Not available
256 bits
64 bytes in the main program
and 64 bytes in
each subroutine and interrupt
routine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
256 bits
Not available
Not available
695