T1600 Packet Forwarding Engine Architecture - Juniper T1600 Hardware Manual

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T1600 Packet Forwarding Engine Architecture

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Documentation
Copyright © 2010, Juniper Networks, Inc.
Figure 4: Control Packet Handling for Routing and Forwarding Table
Updates
T1600 Routing Engine Description on page 37
Maintaining the T1600 Routing Engines on page 154
Replacing a T1600 Routing Engine on page 221
The Packet Forwarding Engines provide the Layer 2 and Layer 3 packet switching,
forwarding, and route lookup functions. The Packet Forwarding Engines are implemented
in ASICs that are physically located on the FPCs and the PICs.
Each Packet Forwarding Engine consists of the following components (see "Data Flow
Through the T1600 Router" on page 10):
Layer 2/Layer 3 Packet Processing ASIC, which performs Layer 2 and Layer 3
encapsulation and de-encapsulation, and manages the division and reassembly of
packets within the T1600 router.
Queuing and Memory Interface ASICs, which manage the buffering of data cells in
memory and the queueing of notifications.
T-series Internet Processor, which provides the route lookup function.
Switch Interface ASICs, which extract the route lookup key and manage the flow of
data cells across the switch fabric.
Media-specific ASICs on the PICs that perform control functions tailored to the PIC
media types.
T1600 Flexible PIC Concentrator (FPC) Description on page 18
T1600 PIC Description on page 30
T1600 Chassis Description on page 14
T1600 Router Description on page 3
Chapter 2: T1600 Router System Architecture Overview
9