Chapter 3. Parameter Settings; Mode Tab - Lattice Semiconductor MachXO2 User Manual

The IPexpress™ tool is used to create IP and architectural modules in the Diamond design software.
vides a list of user-configurable parameters for this IP core. The parameter settings are specified using the LPDDR
SDRAM Controller IP core Configuration GUI in IPexpress.
Table 3-1. LPDDR Core Configuration Parameters
Parameter
Design Entry
Device Family
Part Name
Memory
Clock
Data Width
Wishbone
Row Width
Col Width
Auto Refresh Burst Count
IO Auto Training
Periodic IO Auto Retraining
Partial Array Self Refresh
Memory Clock off
Burst Length
Burst Type
TRCD
TRAS
TRFC
TMRD
TRP
TRC
TREFI
TWTR
TXP
TCKE
TXSR
TSRR
TSRC
TWR

Mode Tab

The Memory Type Selection field is not a user option but is selected by IPexpress when an LPDDR SDRAM Con-
troller core is selected from the IPexpress IP core list.
IPUG92_01.2, October 2012
Configuration 1 Configuration 2
LCMXO2-7000HE-6BG256C
Micron MT46H64M16LF
Disable
12
9
8
Enable
Enable
Figure 3-1 shows the contents of the Mode tab.
14
Parameter Settings
Configuration
Configuration 3
Verilog HDL
MachXO2
133 MHz
16
Disable One Port
12 12
9 9
8 8
Disable Enable
Disable Enable
Full
Disable
4
Sequential
3
8
15
2
3
12
1040
2
2
4
27
3
2
2
LPDDR SDRAM Controller User's Guide
Chapter 3:
Table 3-1 pro-
Configuration 4
One Port
12
9
2
Enable
Enable