Signal Descriptions; Sed Clock Driver; Sed Attributes - Lattice Semiconductor MachXO2 Series Usage Manual

Signal Descriptions

Table 1. SEDFA Primitive Port Definitions
Signal Name
SEDENABLE
SEDSTART
SEDFRCERR
SEDSTDBY
SEDCLKOUT
SEDDONE
SEDINPROG
SEDERR

SED Clock Driver

The SED circuitry is driven by the MachXO2 internal oscillator when using either the SEDFA or SEDFB primitive.
The maximum frequency supported is 33.25 MHz.
The MachXO2 internal oscillator can be used for several functions in the device including Configuration, SED and
as an internal user clock. The frequency of the oscillator output can be set differently for each of these different
uses. The settings available for the SED clock are shown in the table below. When using of the SED, the internal
oscillator frequency is specified using the SED_CLK_FREQ parameter.
Table 2. SED Internal Oscillator Supported Frequency Settings

SED Attributes

There are three attributes that can be used with the SED primitives and these are shown in Table 3. Usage exam-
ples for these attributes can be found in the Sample Code section of this document. Currently the SEDFB primitive
does not support the three attributes listed.
Direction Active
Input High
Input Rising Edge
Input Rising Edge
Input High
Output N/A
Output High
Output High
Output High
2.08 4.16
2.15 4.29
2.22 4.43
2.29 4.59
2.38 4.75
2.46 4.93
2.56 5.12
2.66 5.32
2.77 5.54
2.89 5.78
3.02 6.05
3.17 6.33
3.33 6.65
3.50 7.00
3.69 7.39
3.91 7.82
MachXO2 SED Usage Guide
Description
SRAM CRC enable
Start SRAM CRC cycle
Force an SRAM CRC error flag
SRAM CRC disable while in standby mode
Output clock
SRAM CRC cycle is complete
SRAM CRC cycle is in progress
SRAM CRC error flag
8.31 16.63
8.58 17.73
8.87 19.00
9.17 20.46
9.50 22.17
9.85 24.18
10.23 26.60
10.64 29.56
11.08 33.25
11.57
12.09
12.67
13.30
14.00
14.78
15.65
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