Sed Verilog Examples; Technical Support Assistance - Lattice Semiconductor MachXO2 Series Usage Manual

SEDSTDBY => sed_stdby,
SEDERR => sed_err,
SEDDONE => sed_done,
SEDINPROG => sed_active,
SEDCLKOUT => sed_clkout);

SED Verilog Examples

Verilog SEDFA
module SEDFA (SEDENABLE, SEDSTART, SEDFRCERR, SEDSTDBY, SEDERR, SEDDONE, SEDINPROG,
SEDCLKOUT);
input SEDENABLE, SEDSTART, SEDFRCERR, SEDSTDBY;
output SEDERR, SEDDONE, SEDINPROG, SEDCLKOUT;
parameter SED_CLK_FREQ = "3.5";
parameter CHECKALWAYS = "DISABLED";
parameter DEV_DENSITY = "1200L";
//"256L","640L","1200L","2000L","4000L","7000L","640U", "1200U", and "2000U"
endmodule
Verilog SEDFA Primitive Instantiation
// instantiate SEDFA primitive module with parameter passing to SEDFA module
SEDFA # (.SED_CLK_FREQ("4.75"), .DEV_DENSITY("1200L"))
sedfa_tst (.SEDENABLE(1'b1), .SEDSTART(sed_start), .SEDFRCERR(1'b0), .SEDSTDBY(),
.SEDERR(sed_err),
OUT(sed_clkout) );

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.SEDDONE(sed_done),
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MachXO2 SED Usage Guide
.SEDINPROG(sed_active), .SEDCLK-