Chapter 1. Introduction; Introduction; Quick Facts; Features - Lattice Semiconductor MachXO2 User Manual

Lpddr sdram controller ip core
Hide thumbs Also See for MachXO2:
Table of Contents

Advertisement

Introduction

The LPDDR Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory
controller that interfaces with industry standard LPDDR memory devices/modules compliant with JESD209B,
LPDDR SDRAM Standard, and provides a generic command interface to user applications. This IP core reduces
the effort required to integrate the LPDDR memory controller with the remainder of the application and minimizes
the need to directly deal with the LPDDR memory interface.

Quick Facts

Table 1-1
gives quick facts about the LPDDR SDRAM Controller IP core for MachXO2™ devices.
Table 1-1. LPDDR SDRAM Controller IP Core Quick Facts
Core Requirements
Resource Utilization
Design Tool
Support

Features

• Interfaces to industry standard LPDDR SDRAM according to JESD209B
• Double-data rate architecture; two data transfers per clock cycle
• Bi-directional data strobe per byte of data (DQS)
• Programmable auto refresh support
• Data mask support – one mask per byte
• Power down and deep power down support
• Supports power-on initialization
• Supports re-initialization after a deep power down
• Dynamic I/O training after initialization
• Periodic I/O retraining after an auto refresh burst
• Dynamic memory clock power off during self refresh, power down and deep power down operations
• Supports single-port operation
• Supports full, half and quarter array self refresh
• Status register read support
• TCSR programmability through MRS
IPUG92_01.2, October 2012
FPGA Family
Targeted Devices
Configuration
Registers
Slices
LUTs
EBRs
f
(MHz)
MAX
Lattice Implementation
Synthesis
Simulation
LCMXO2-7000HE-6BG256C
Configuation 1
Configuration 2
911
804
814
705
1530
1314
0
0
136.4
136.6
Lattice Diamond
®
Synopsys
Synplify™ Pro for Lattice F-2011.09L
Mentor Graphics
4
Introduction
MachXO2
Configuration 3
969
729
1409
0
142.9
®
1.3
®
ModelSim™ SE 6.3F
LPDDR SDRAM Controller User's Guide
Chapter 1:
Configuration 4
969
729
1409
0
142.9

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the MachXO2 and is the answer not in the manual?

Table of Contents