Figure A.3. Fpga - Lattice Semiconductor MachXO2 User Manual

5
VBUS_5V
L3
D
600ohm 500mA
J2
1
VCC
2
D-
3
D+
4 R30 0
ID
5
GND
C16 0.1uF
SKT_MINIUSB_
B_RA
C
VBUS_5V
U4
R41
3
IN
1K
D1 C19
GND
Blue
10uF
B
U3
FAN1112
3
Input Output
C17
A
Tab
10uF
5
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FPGA-EB-02036-1.4
4
+3.3V VCC_CORE
C15
R24 1
0.1uF
+1.2V
R86 1
DNI
DM Sheet[2]
TP5
DP Sheet[2]
VCC_CORE
R42 0 L5
2 2
OUT
4 600ohm 500mA
TAB
C20 C21
22uF 0.1uF
1
NCP1117
+1.2V
R35 0 L4
2 2 1
600ohm 500mA
4 C18
R36
22uF
100
4
MachXO2 and MachXO3 Starter Kit Evaluation Board User Guide
3
+3.3V VCCIO0 +3.3V VCCIO1
R31 1 R25 1
+1.2V +1.2V
R33 1 R28 1
DNI DNI
TP6 TP7
VCCIO0 VCCIO1
+3.3V VCCIO3 +3.3V VCCIO4
R32 1 R26 1
+3.3V
+1.2V +1.2V
1
R34 1 R29 1
DNI DNI
TP9 TP10
VCCIO3 VCCIO4
TP1 TP2
+3.3V +1.2V
+3.3V
C61 C62 C63 C64
10uF 1uF 0.1uF 0.01uF
3

Figure A.3. FPGA

Evaluation Board User Guide
2 1
VCCI
+3.3V
O2
R37 1
NOTE : Boot from external SPI Flash (U6)
requires VCCIO2 set to 3.3V. Use caution when
setting VCCIO2 to any other voltage.
+1.2V
R39 1
DNI
TP8
VCCIO2
+3.3V VCCIO5
R38 1
+1.2V
R40 1
DNI
TP11
VCCIO5
TP3
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Phone (503) 268-8001 -or- (800) LATTICE
Title
POWER REGULATORS
Size
Project
MACHXO3 Starter Kit - LCMXO3L-6900C
B
Date: Sheet
12-SEP-2014
2
1
D
C
B
A
Schematic Rev 1.0
Board Rev A
3 of 8
31