User Commands - Lattice Semiconductor MachXO2 User Manual

Lpddr sdram controller ip core
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the user logic that it is ready to receive a command by asserting the cmd_rdy signal for one cycle. If the core finds
the cmd_valid signal asserted by the user logic while cmd_rdy is asserted, it takes the cmd input as a valid user
command. cmd_valid should be de-asserted at the rising edge of the clock that samples cmd_rdy high. The core
also accepts the addr input as a valid start address or mode register programming data depending on the com-
mand type. When the core reaches the boundary of the current page while accessing the memory, the next
address that the core will access becomes the beginning of the same page. It will cause overwriting of the contents
of the location or reading unexpected data. Therefore, the user must track the accessible address range in the cur-
rent page while the command burst operation is performed.
Figure 2-3. Timing of Command and Address
cmd_valid
cmd_rdy

User Commands

The user initiates a request to the memory controller by loading a specific command code in cmd input along with
other information such as the memory address. The command on the cmd bus must be a valid command. Lattice
defines a set of valid memory commands as shown in
Table 2-4. Defined User Commands for Generic Interface
Read
Write
Read with Auto Precharge
Write with Auto Precharge
Powerdown Entry
Load Mode Register
Status Register Read
Self Refresh Entry
Self Refresh Exit
Powerdown Exit
Deep Powerdown Entry
Deep Powerdown Exit
IPUG92_01.2, October 2012
clk_in
C0
cmd
A0
addr
Command
C1
C2
A1
A2
Table
2-4. All other values should not be used.
Mnemonic
RD
WR
RDA
WRA
PDE
LMR
SRR
SRE
SRX
PDE
DPDE
DPDX
9
LPDDR SDRAM Controller User's Guide
Functional Description
cmd[3:0]
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100

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