Demonstration Design; Overview; Figure 7.1. Machxo2 And Machxo3L/Lf-6900C Block Diagram - Lattice Semiconductor MachXO2 User Manual

MachXO2 and MachXO3 Starter Kit Evaluation Board User Guide
Evaluation Board User Guide

6. Demonstration Design

Lattice provides a simple, pre-programmed demo to illustrate basic operation of the MachXO2 and MachXO3 devices.
The design integrates an up-counter with the on-chip oscillator. For the XO3L Starter Kit, pre-programmed design
resides in the external Serial Flash Memory (SPANSION S25FL204K or S25FL208K, or ON Semiconductor LE25U40CMD).
For the XO2 and XO3LF Starter Kits, the pre-programmed design resides in the on-board configuration flash memory.
Note: To restore the factory default demo and program it with other Lattice-supplied examples see the
Demo Designs section.

Overview

The Starter Kit is a complete development platform for the MachXO2 and MachXO3 FPGAs. The board includes a
prototyping area, a USB program/power port, an LED array, switches, and header landings with electrical connections
to most of the FPGA's programmable I/O, power, and configuration pins. The board is powered by the PC's USB port or
optionally with external power. You may create or modify the program files and reprogram the board using Lattice
Diamond software.
Bank 3, 4 and 5
GPIO
Landing (J8)
DIP_SW
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12
Bank 0
2 x 20 Header
Landing (J3)
JTAG
Programming
GPIO
MachXO3L/LF-6900C device
4
GPIO
2 x 20 Header 1 x 6 Header
Landing (J6) Landing (J7,
Optional SPI,
Bank 2
I
Figure 6.1. MachXO2 and MachXO3L/LF-6900C Block Diagram
USB Mini B
USB
Controller
1 x 8 Header
Landing (J1,
Optional JTAG
Interface)
GPIO
8
C Intrfaces)
2
Bank 0, 2
Download
Socket
Bank 1
2 x 20 Header
Landing (J4)
LED
Array
FPGA-EB-02036-1.4