Using The Local User Interface; Initialization Control; Command And Address - Lattice Semiconductor MachXO2 User Manual

Table 2-2. LPDDR SDRAM Memory Controller Top-Level I/O List for Wishbone Interface (Continued)
Port Name
PORT0_DAT_O[31:0],
PORT1_DAT_O[31:0]
PORT0_ACK_O,
PORT1_ACK_O
PORT0_ERR_O,
PORT1_ERR_O
PORT0_RTY_O,
PORT1_RTY_O

Using the Local User Interface

The local user interface of the LPDDR memory controller IP core consists of five independent functional groups:

• Initialization Control

• Command and Address

• Data Write
• Data Read
Each functional group and its associated local interface signals as listed in
Table 2-3. Local User Interface Functional Groups
Initialization Control
Command and Address
Data Write
Data Read
Initialization Control
LPDDR memory devices must be initialized before the memory controller can access them. The memory controller
starts the memory initialization sequence when the init_start signal is asserted by the user interface. Once
asserted, the init_start signal needs to be held high until the initialization process is completed. The output signal
init_done is asserted high for one clock cycle indicating that the core has completed the initialization sequence and
is now ready to access the memory. The init_start signal must be de-asserted as soon as init_done is sampled high
at the rising edge of sclk. If the init_start is left high at the next rising edge of sclk, the memory controller takes it as
another request for initialization and starts the initialization process again. Memory initialization is required only
once, immediately after the system reset.
Figure 2-2. Timing of Memory Initialization Control
init_done
init_start
Command and Address
Once the memory initialization is done, the core waits for user commands in order to set up and/or access the
memory. The user logic needs to provide the command and address to the core along with the control signals. The
commands and addresses are delivered to the core using the following procedure. The memory controller core tells
IPUG92_01.2, October 2012
I/O
Output The data Output array used for read data
The acknowledge output ACK_O, when asserted, indicates the termination of
Output
a normal bus cycle by the slave
Output The error output ERR_O indicates an abnormal cycle termination by the slave.
The retry output RTY_O indicates that the slave interface is not ready to accept or
Output
send data
Functional Group
clk_in
Description
Table
Signals
init_start, init_done
addr, cmd, cmd_rdy, cmd_valid
datain_rdy, write_data, data_mask
read_data, read_data_valid
8 LPDDR SDRAM Controller User's Guide
Functional Description
2-3.