Mode Register Programming - Lattice Semiconductor MachXO2 User Manual

Lpddr sdram controller ip core
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Mode Register Programming

The LPDDR SDRAM memory devices are programmed using the mode registers MRS and EMRS. The bank
address bus (em_ddr_ba) is used to choose one of the Mode registers, while the programming data is delivered
through the address bus (em_ddr_addr). The memory data bus cannot be used for mode register programming.
The Lattice LPDDR memory controller core uses the local address bus, addr, to program these registers. The core
accepts a user command, LMR, to initiate the programming of mode registers. When LMR is applied on the cmd
bus, the user logic must provide the information for the targeted mode register and the programming data on the
addr bus. When the target mode register is programmed, the memory controller core is also configured to support
the new memory setting.
registers.
Table 2-7. Mode Register Selection Using Bank Address Bits
IPUG92_01.2, October 2012
Table 2-7
shows how the local address lines are allocated for the programming of memory
Mode Register
MRS
EMRS
(addr[9:8])
00
10
13
LPDDR SDRAM Controller User's Guide
Functional Description

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