9.1
A-B Connector Signal Descriptions
High Definition Audio Link Signals Descriptions
Table 4
Intel
®
Signal
Pin #
AC/HDA_RST#
A30
AC/HDA_SYNC
A29
AC/HDA_BITCLK
A32
AC/HDA_SDOUT
A33
AC/HDA_SDIN[2:0] B28-B30 Intel
Note
Some signals have special functionality during the reset process. They may bootstrap some basic important functions of the module.
For more information refer to section 9.5 of this user's guide.
Table 5
Gigabit Ethernet Signal Descriptions
Gigabit Ethernet Pin # Description
GBE0_MDI0+
A13
GBE0_MDI0-
A12
GBE0_MDI1+
A10
GBE0_MDI1-
A9
GBE0_MDI2+
A7
GBE0_MDI2-
A6
GBE0_MDI3+
A3
GBE0_MDI3-
A2
GBE0_ACT#
B2
GBE0_LINK#
A8
GBE0_LINK100#
A4
GBE0_LINK1000#
A5
Copyright © 2013 congatec AG
Description
High Definition Audio Reset: This signal is the master hardware reset
®
Intel
to external codec(s).
High Definition Audio Sync: This signal is a 48 kHz fixed rate sample
®
Intel
sync to the codec(s). It is also used to encode the stream number.
High Definition Audio Bit Clock Output: This signal is a 24.000MHz
Intel
®
serial data clock generated by the Intel
High Definition Audio Serial Data Out: This signal is the serial TDM
Intel
®
data output to the codec(s). This serial output is double-pumped for a bit rate
High Definition Audio.
®
of 48 Mb/s for Intel
High Definition Audio Serial Data In [0]: These signals are serial TDM
®
data inputs from the three codecs. The serial input is single-pumped for a bit
High Definition Audio.
rate of 24 Mb/s for Intel
®
Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs 0, 1, 2, 3. The MDI can operate
in 1000, 100, and 10Mbit/sec modes. Some pairs are unused in some modes according to the following:
1000
MDI[0]+/-
B1_DA+/-
MDI[1]+/-
B1_DB+/-
MDI[2]+/-
B1_DC+/-
MDI[3]+/-
B1_DD+/-
Gigabit Ethernet Controller 0 activity indicator, active low.
Gigabit Ethernet Controller 0 link indicator, active low.
Gigabit Ethernet Controller 0 100Mbit/sec link indicator, active low.
Gigabit Ethernet Controller 0 1000Mbit/sec link indicator, active low.
High Definition Audio controller.
®
100
10
TX+/-
TX+/-
RX+/-
RX+/-
TU87m12
I/O
PU/PD Comment
O 3.3VSB
AC'97 codecs are not supported.
O 3.3VSB
AC'97 codecs are not supported.
O 3.3VSB
AC'97 codecs are not supported.
O 3.3VSB
PU 1K
AC'97 codecs are not supported.
AC/HDA_SDOUT is a boot strap signal
3.3VSB
(see note below)
I 3.3VSB
AC'97 codecs are not supported.
I/O
PU/PD Comment
I/O Analog
O 3.3VSB
O 3.3VSB
O 3.3VSB
O 3.3VSB
Twisted pair
signals for
external
transformer.
49/114
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