Congatec COM Express conga-TC87 User Manual page 90

Feature
Limit CPUID Maximum
Execute Disable Bit
Intel Virtualization Technology
Hardware Prefetcher
Adjacent Cache Line Prefetch
CPU AES
EIST
Energy Performance
Turbo Mode
Package Power Limit Lock
CPU Power Limit1
CPU Power Limit1 Time
CPU Power Limit2
Platform Power Limit Lock
CPU Power Limit3
CPU Power Limit3 Time
CPU Power Limit3 Duty Cycle
DDR Power Limit1
DDR Power Limit1 Time
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Options Description
Disabled When enabled, the processor limits the maximum CPUID input value to 03h when queried, even if the processor
Enabled supports a higher CPUID input value.
When disabled, the processor returns the actual maximum CPUID input value of the processor when queried.
Limiting the CPUID input value may be required for older operating systems that cannot handle the extra CPUID
information returned when using the full CPUID input value.
Disabled Enable or disable the Execute Disable Bit (XD) of the processor. With the XD bit set to enabled, certain classes of
malicious buffer overflow attacks can be prevented when combined with a supporting OS.
Enabled
Disabled When enabled, a VMM can utilize the integrated hardware virtualization support.
Enabled
Disabled Enable or disable the Mid Level Cache (L2) streamer prefetcher.
Enabled
Enable or disable the Mid Level Cache (L2) prefetching of adjacent cache lines.
Disabled
Enabled
Disabled Enable or disable CPU Advanced Encryption Standard (AES) instructions.
Enabled
Disabled Enable or disable Enhanced Intel SpeedStep Technology (EIST).
Enabled
Performance Optimize between performance and power savings.
Balanced
Perform.
Balanced Energy
Energy Efficient
Disabled Enable or disable Turbo Mode.
Enabled
When enabled, PACKAGE_POWER_LIMIT MSR will be locked and a reset will be required to unlock the register.
Disabled
Enabled
0-255 CPU Power Limit1 value
Default : 0
0-255 Time window in which the Power Limit1 is maintained.
Default : 0
0-255 CPU Power Limit2 value
Default : 0
When enabled, PLATFORM_POWER_LIMIT MSR will be locked and a reset will be required to unlock the register.
Disabled
Enabled
0-255 CPU Power Limit3 value
Default : 0
0-255 Time window in which the Power Limit3 is maintained.
Default : 0
Specify in percentage the duty cycle that the CPU is required to maintain over the configured Power Limit3 time
0-100
Default : 0 windows.
0-255 DDR Power Limit1 value
Default : 0
0-255 Time window in which the DDR Power Limit1 is maintained.
Default : 0
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