Lpc Bus; I²C Bus Fast Mode; Pci Express - Congatec COM Express conga-TC87 User Manual

of Ethernet controller since it only has 3 LED outputs, ACT#, LINK100# and LINK1000#. The GBE0_LINK# signal is a logic AND of the
GBE0_LINK100# and GBE0_LINK1000# signals on the conga-TC87 module.
The Intel i218 device driver offers a new feature called ULP (Ultra Low Power) mode. In this mode, the Intel i218 driver sets the LED outputs
of the controller to tri-state mode. As a result, the ethernet link and activity LEDs may lit when no ethernet cable is connected. This issue is
common with older driver versions because the ULP feature is enabled by default and cannot be disabled. In newer driver version, this feature
can be disabled.
To have the correct LED status, congatec recommends that you use the latest i218 device driver provided on the website and additionally
disable the ULP mode.
6.1.5

LPC Bus

conga-TC87 offers the LPC (Low Pin Count) bus through the Intel
bus. The LPC bus corresponds approximately to a serialized ISA bus yet with a significantly reduced number of signals. Due to the software
compatibility to the ISA bus, I/O extensions such as additional serial ports can be easily implemented on an application specific baseboard
using this bus. See section
6.1.6 I²C Bus Fast Mode
The I²C bus is implemented through the congatec board controller (Texas Instruments Tiva™ TM4E1231H6ZRB) and accessed through the
congatec CGOS driver and API. The controller provides a Fast Mode multi-master I²C Bus that has maximum I²C bandwidth.
6.1.7

PCI Express™

The conga-TC87 offers 5 PCI Express™ lanes via the Intel
The remaining lane is used by the onboard Gigabit Ethernet interface. The lanes are Gen 2 compliant and offer support for full 5 Gb/s bandwidth
in each direction per x1 link.
Default configuration for the lanes on the AB connector is 4x1 link. A 1x4 and 2x2 link configuration is also possible but requires a special/
customized BIOS firmware. Contact congatec technical support for more information about this subject.
The PCI Express interface is based on the PCI Express Specification 2.0 with Gen 1 (2.5Gb/s) and Gen 2 (5 Gb/s) speed.
Copyright © 2013 congatec AG
10.1.1 for more information about the LPC Bus.
® 8 Series PCH-LP. Four of these lanes are offered externally on the A-B connector.
® 8 Series PCH-LP. There are many devices available for this Intel
TU87m12
defined
®
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