Keithley 2001 Operator's Manual page 229

Programming example
Formats
Description
Programming example
2001-900-01 Rev. K / August 2010
If both the lower and upper limits of LIMIT 1 pass, the test sequence will proceed on to test the
limits of LIMIT 2 (if enabled). If all the enabled test limits pass, then the programmed "pass"
digital pattern (see :PASS:SOURce) will be applied to the output port.
Note that when a limit test (LIMIT 1 or LIMIT 2) is enabled, the digital output port cannot be
controlled from the Source subsystem.
When LIMIT 1 or LIMIT 2 is disabled, the respective limit tests will, of course, not be included
in the test sequence. Also, a fail indication (see :FAIL?) for LIMIT 1 or LIMIT 2 will be cleared
when the respective limit test is disabled.
10 OUTPUT 716; ":calc3:lim:stat on; stat?"
20 ENTER 716; A$
30 PRINT A$
40 END
Line 10 Enables LIMIT 1 test, and then queries the state of LIMIT 1.
Line 20 Addresses the Model 2001 to talk.
Line 30 Displays the state of LIMIT 1 (1; on).
:FAIL?
:CALCulate3:LIMit[1]:FAIL?
:CALCulate3:LIMit2:FAIL?
:calc3:lim:fail?
:calc3:lim2:fail?
These commands are used to read the results of LIMIT 1 and LIMIT 2 tests. After sending one
of these commands and addressing the Model 2001 to talk, a value (0 or 1) will be sent to the
computer:
0 = Limit test passed
1 = Limit test failed
The response message (0 or 1) only tells you if a limit test has passed or failed. It does not tell
you which limit (upper or lower) has failed. To determine which limit has failed, you will have
to read the Measurement Event Register (see
Reading the results of a limit test does not clear the fail indication of the test. A failure can be
cleared by using a :CLEar command, or by disabling the test (:STATe OFF).
This example assumes that LIMIT 1 test has been performed.
10 OUTPUT 716; ":calc3:lim:fail?"
20 ENTER 716; A$
30 PRINT A$
40 END
Line 10Queries the result of LIMIT 1 test.
Line 20 Addresses the Model 2001 to talk.
Line 30 Displays the result of LIMIT 1 test.
Read LIMIT 1 test results
Read LIMIT 2 test results
paragraph 4.6.6).
IEEE-488 Reference
4-71