Keithley 2001 Operator's Manual page 179

The IEEE-488.2 standard uses the following common query
command that simply reads the Status Byte Register con-
tents:
*STB?
When reading the Status Byte Register using the *STB?
command, bit B6 is called the MSS bit. None of the bits in
the Status Byte Register are cleared when using the *STB?
command to read it.
The IEEE-488.1 standard has a serial poll sequence that will
also read the Status Byte Register and is better suited to de-
tect a service request (SRQ). When using the serial poll, bit
B6 is called the RQS bit. Serial polling causes bit B6 (RQS)
to reset. Serial polling is discussed in more detail later in this
paragraph (see "Serial Poll and SRQ").
The following operations clear all bits of the Status Byte
Register:
1. Cycling power.
2. Sending the *CLS common command.
The MAV bit may or may not be cleared.
Service Request Enable Register  This register is pro-
grammed by the user and serves as a mask for the Status
Summary Message bits (B0, B2, B3, B4, B5 and B7) of the
Status Byte Register. When masked, a set summary bit in the
Status Byte Register will not set bit B6 (MSS/RQS) of the
Status Byte Register. Conversely, when unmasked, a set
summary bit in the Status Byte Register will set bit B6.
A Status Summary Message bit in the Status Byte Register is
masked when the corresponding bit in the Service Request
Enable Register is cleared (0). When the masked summary
bit in the Status Byte Register sets, it is ANDed with the cor-
responding cleared bit in the Service Request Enable Regis-
ter. The logic "0" output of the AND gate is applied to the
input of the OR gate and thus, will not set the MSS/RQS bit
in the Status Byte Register.
A Status Summary Message bit in the Status Byte Register is
unmasked when the corresponding bit in the Service Request
Enable Register is set (1). When the unmasked summary bit
in the Status Byte Register sets, it is ANDed with the corre-
sponding set bit in the Service Request Enable Register. The
logic "1" output of the AND gate is applied to the input of
the OR gate and thus, will set the MSS/RQS bit in the Status
Byte Register.
2001-900-01 Rev. K/ August 2010
NOTE
The individual bits of the Service Request Enable Register
can be set or cleared by using the following common com-
mand (see paragraph 4.10.12
*SRE <NRf>
The Service Request Enable Register can be read using the
following common query command (see
for details):
*SRE?
The Service Request Enable Register is not cleared when it
is read using the *SRE? query command. The Service Re-
quest Enable Register will clear when power is cycled or a
parameter (n) value of zero is sent with the *SRE command
(*SRE 0).
Serial poll and SRQ
Any enabled event summary bit that goes from 0 to 1 will set
RQS and generate a service request (SRQ). The user's test
program can periodically read the Status Byte Register to
check to see if a service request (SRQ) has occurred and
what caused it. In the event of an SRQ, the program can, for
example, branch to an appropriate subroutine that will ser-
vice the request. Typically, service requests (SRQs) are man-
aged by the serial poll sequence of the Model 2001. If an
SRQ does not occur, bit B6 (RQS) of the Status Byte Regis-
ter will remain cleared and the program will simply proceed
normally after the serial poll is performed. If an SRQ does
occur, bit B6 of the Status Byte Register will set and the pro-
gram can branch to a service subroutine when the SRQ is de-
tected by the serial poll.
The serial poll will automatically reset RQS of the Status
Byte Register. This will allow subsequent serial polls to
monitor Bit 6 for an SRQ occurrence generated by other
event types. After a serial poll, the same event can cause an-
other SRQ, even if the event register which caused the first
SRQ has not been cleared.
A serial poll clears RQS but does not clear MSS. The MSS
bit will stay set until all Status Byte event summary bits are
cleared.
The following HP BASIC 4.0 programming example dem-
onstrates how a serial poll can be used to detect an SRQ.
10REMOTE 716
20CLEAR
30OUTPUT 716; "*ESE 32"
mand error bit (B5) in Standard Event
Enable Register
IEEE-488 Reference
for details):
paragraph 4.10.13
716
!Unmask com-
4-21