Jumper Header Definitions; Figure 2-7. Jumper Header Locations (Top Side); Table 2-3. Jumper Settings - ADLINK Technology CoreModule 720 Reference Manual

Chapter 2

Jumper Header Definitions

Table 2-3 describes the jumper headers shown in
pitch.

Table 2-3. Jumper Settings

Jumper Header
JP1 – Clear CMOS
JP3 – LVDS Voltage Selection
JP1
CoreModule 720
Figure
Installed
Enable
Enable +3.3V (1-2) (Default)
Key:
JP1 - Clear CMOS
JP3 - LVDS Voltage Select
JP3

Figure 2-7. Jumper Header Locations (Top Side)

Reference Manual
2-7. Both jumper headers provide 0.079" (2mm)
Removed
Disable (Default)
Enable +5V (2-3)
Product Overview
13