Synchronization Status Message; Ethernet Synchronization Messaging Channel; Clock Selection Algorithm - Cisco ASR1000-RP1 - ASR 1000 Series Route Processor 1 Router Software Configuration Manual

Chapter 10 Synchronous Ethernet Support

Synchronization Status Message

Network elements use Synchronization Status Messages (SSM) to inform the neighboring elements
about the Quality Level (QL) of the clock. The non-ethernet interfaces such as optical interfaces and T1
or E1 SPA frames, use SSM. The key benefits of the SSMs are:
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Ethernet Synchronization Messaging Channel

In order to maintain a logical communication channel in synchronous network connections, Ethernet
relies on a channel called the Ethernet Synchronization Messaging Channel (ESMC), which is based on
the IEEE 802.3 Organization-Specific Slow Protocol (OSSP) standards. ESMC relays the SSM code that
represents the quality level of the Ethernet Equipment Clock (EEC) in a physical layer.
The ESMC packets are received only for the ports configured as clock sources, and transmitted on all
the SyncE interfaces in the system. These packets are then processed by the clock selection algorithm
on route processors (RP) and are used to select the best clock. The Tx frame is generated based on the
QL value of the selected clock source, and sent to all the enabled SyncE ports.

Clock Selection Algorithm

The clock selection algorithm selects the best available synchronization source from the nominated
sources. This algorithm exhibits nonrevertive behavior among the clock sources with the same QL value,
and always selects the signal with the best QL value. For clock option 1, the default is revertive, and for
clock option 2, the default is nonrevertive.
The clock selection process works in the following modes:
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When multiple selection processes are present in a network element, all the processes work in the same
mode.
QL-Enabled Mode
In QL-enabled mode, the following parameters contribute to the selection process:
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If no external commands are active, the algorithm selects the reference (for clock selection) with the
highest QL that does not experience a signal fail condition. If multiple inputs have the same highest QL,
the input with the highest priority is selected. For multiple inputs having the same highest priority and
QL, the existing reference is maintained (if it belongs to highest priority and QL group). Otherwise, an
arbitrary reference from highest priority and QL group is selected.
OL-16506-10
Prevents timing loops.
Provides fast recovery when a part of the network fails.
Ensures that a node get timing from the most reliable clock source.
QL-Enabled Mode, page 10-3
QL-Disabled Mode, page 10-4
Quality level
Signal fail via QL-FAILED
Priority
External commands.
Cisco ASR 1000 Series Aggregation Services Routers Software Configuration Guide
Synchronization Status Message and Ethernet Synchronization Messaging Channel
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