Quectel SG560D Series Hardware Design page 85

Table 30: Relationship Between DSI Rate and Line Length (D-PHY)
Data Rate
500 Mbps/Lane
750 Mbps/Lane
1.0 Gbps/Lane
1.5 Gbps/lane
2.1 Gbps/lane
2.5 Gbps/lane
NOTE
1. The cable length listed above is an example with specified insertion loss.
2. The cable insertion loss can be obtained from the cable datasheet provided by the manufacturer.
The cable insertion loss in the actual design should not be worse than those listed above.
3. The line length in the above table includes the length of the line inside the module.
Table 31: Trace Length of MIPI Differential Pairs Inside the Module
Pin No. Pin Name
370 DSI_CLK_N
366 DSI_CLK_P
SG560D_Series_Hardware_Design
152.4
Cable Length (mm)
76.2
152.4
76.2
152.4
76.2
152.4
76.2
152.4
76.2
152.4
76.2
152.4
-3.5
Cable Insertion Loss (dB)
-0.5
-1.0
-0.7
-1.15
-0.75
-1.4
-0.9
-1.8
-1.3
-2.3
-2.1
-3.5
Length (mm)
25.97
25.68
Smart Module Series
< 150
Line Length (mm)
< 280
< 210
< 210
< 150
< 200
< 100
< 135
< 40
< 150
< 80
< 70
< 0
Length Difference (P - N)
-0.29
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