Quectel SG560D Series Hardware Design page 34

Smart module
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CSI3_CLK_N
CSI3_LN0_P
CSI3_LN0_N
CSI3_LN1_P
CSI3_LN1_N
CSI3_LN2_P
CSI3_LN2_N
CSI3_LN3_P
CSI3_LN3_N
CAM3_MCLK
CAM3_RST
VREG_L1P_1P05
VREG_L2P_1P1
VREG_L3P_2P8
VREG_L4P_2P9
VREG_L5P_2P8
VREG_L6P_1P8
VREG_L7P_2P8
(U)SIM Interfaces
Pin Name
SG560D_Series_Hardware_Design
66
AI
MIPI CSI3 clock (-)
MIPI CSI3 lane 0
60
AI
data (+)
MIPI CSI3 lane 0
61
AI
data (-)
MIPI CSI3 lane 1
68
AI
data (+)
MIPI CSI3 lane 1
69
AI
data (-)
MIPI CSI3 lane 2
64
AI
data (+)
MIPI CSI3 lane 2
65
AI
data (-)
MIPI CSI3 lane 3
72
AI
data (+)
MIPI CSI3 lane 3
73
AI
data (-)
Master clock of
74
DO
camera 3
67
DO
Reset of camera 3
DVDD for cameras
116
PO
1 and 2
DVDD for cameras
121
PO
0 and 3
AVDD for cameras
113
PO
1 and 3
124
PO
AVDD for camera 0
AFVDD for camera
128
PO
0
DOVDD for
117
PO
cameras 0, 1, 2 and
3
120
PO
AVDD for camera 2
Pin No.
I/O
Description
Smart Module Series
1.8 V
Vnom = 1.05 V
I
max = 600 mA
O
Vnom = 1.1 V
I
max = 600 mA
O
Vnom = 2.8 V
I
max = 300 mA
O
Vnom = 2.9 V
I
max = 300 mA
O
Vnom = 2.8 V
I
max = 300 mA
O
Vnom = 1.8 V
I
max = 300 mA
O
Vnom = 2.8 V
I
max = 300 mA
O
DC Characteristics
differential
impedance of
85 Ω.
When using them,
it is recommended
to add bypass
capacitors with a
total capacitance
not exceeding
45.3 μF.
When using them,
it is recommended
to add bypass
capacitors with a
total capacitance
not exceeding
19 μF.
Comment
33 / 134

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