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308
NOTE
1.
The QUP SE channel can be used flexibly to support UART, SPI and I2C interfaces.
2.
Note that one QUP SE channel cannot support two protocols at the same time. For example,
QUP0-SE0 cannot support UART and I2C at the same time. If one interface only occupies parts of
the pins in one QUP SE channel, then other pins in the channel can only be used as GPIOs.
Table 24: I2S Multiplex Relationship Table
Channel
Pin No.
144
141
1
145
148
142
140
2
137
133
136
175
167
3
210
310
190
4
158
SG560D_Series_Hardware_Design
GPIO_63
GPIO_63
UART_TXD
GPIO_50
Pin Name
LPI_DMIC1_CLK
LPI_DMIC1_DATA
LPI_DMIC2_CLK
LPI_DMIC2_DATA
MI2S_MCLK
MI2S_SCLK
MI2S_WS
MI2S_DATA0
MI2S_DATA1
GPIO_105
GPIO_106
GPIO_107
GPIO_108
HALL_INT
ACCEL_GYRO_INT2
-
SPI16_CS2
-
SPI16_CS3
Multiplex Function
GPIO No.
I2S
GPIO_150
LPI_I2S1_SCLK
GPIO_151
LPI_I2S1_WS
GPIO_152
LPI_I2S1_DATA0
GPIO_153
LPI_I2S1_DATA1
GPIO_96
PRI_MI2S_MCLK
GPIO_97
MI2S0_SCLK
GPIO_100
MI2S0_WS
GPIO_98
MI2S0_DATA0
GPIO_99
MI2S0_DATA1
GPIO_105
MI2S1_DATA1
GPIO_106
MI2S1_SCLK
GPIO_107
MI2S1_DATA0
GPIO_108
MI2S1_WS
GPIO_101
MI2S2_SCLK
GPIO_102
MI2S2_DATA0
Smart Module Series
-
-
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