Quectel SG560D Series Hardware Design page 111

Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground)
To ensure better RF performance and reliability, the following conditions should be complied with in RF
layout design:
⚫
Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to
50 Ω.
⚫
GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
⚫
Clearance between RF pins and RF connector should be as short as possible, and all right-angle
(90°) traces should be changed to the ones with the angle of 135°.
⚫
There should be clearance under the signal pin of the antenna connector or solder joint.
⚫
The reference ground of RF traces should be complete. Meanwhile, ground vias around RF traces
and the reference ground can improve RF performance. The clearance between ground vias and RF
traces should be at least twice the width of RF signal traces (2 × W).
⚫
Keep RF traces away from interference sources, and avoid intersection and paralleling between any
traces on adjacent layers.
For more details about RF layout, see document [2].
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