Quectel SG560D Series Hardware Design page 32

DSI_LN2_N
DSI_LN3_P
DSI_LN3_N
LCD_TE
LCD_RST
Camera Interfaces
Pin Name
CSI0_CLK_P
CSI0_CLK_N
CSI0_LN0_P
CSI0_LN0_N
CSI0_LN1_P
CSI0_LN1_N
CSI0_LN2_P
CSI0_LN2_N
CSI0_LN3_P
CSI0_LN3_N
CAM0_MCLK
CAM0_RST
CSI1_CLK_P
CSI1_CLK_N
CSI1_LN0_P
SG560D_Series_Hardware_Design
LCD MIPI lane 2
369 AO
data (-)
LCD MIPI lane 3
368 AO
data (+)
LCD MIPI lane 3
365 AO
data (-)
374 DI LCD tearing effect
378 DO LCD reset
Pin No. I/O Description
14 AI MIPI CSI0 clock (+)
18 AI MIPI CSI0 clock (-)
MIPI CSI0 lane 0
16 AI
data (+)
MIPI CSI0 lane 0
17 AI
data (-)
MIPI CSI0 lane 1
20 AI
data (+)
MIPI CSI0 lane 1
21 AI
data (-)
MIPI CSI0 lane 2
24 AI
data (+)
MIPI CSI0 lane 2
25 AI
data (-)
MIPI CSI0 lane 3
28 AI
data (+)
MIPI CSI0 lane 3
29 AI
data (-)
Master clock of
30 DO
camera 0
26 DO Reset of camera 0
38 AI MIPI CS1 clock (+)
42 AI MIPI CSI1 clock (-)
MIPI CSI1 lane 0
40 AI
data (+)
Smart Module Series
1.8 V
DC Characteristics
1.8 V
External pull-up is
not required.
Comment
Requires
differential
impedance of
85 Ω.
Requires
differential
impedance of
85 Ω.
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