VIA Technologies Apollo Pro133A Design Manual page 93

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Technologies, Inc.
We Connect
We Connect
Signal Name
USBP0+,
USBP0-
OC0#/
DACK2#/
GPIOF
USBP1+,
USBP1-
OC1#/
DRQ2/
GPIOF/
SERIRQ
USBP2+,
USBP2-
USBP3+,
USBP3-
USBCLK
Signal Name
SMBCLK,
SMBDATA
SMBALRT/GPI6
Preliminary Revision 0.5, November 19, 1999
USB INTERFACE
I/O
IO
Connect to USB(0) connector. 47pF capacitor to ground with 27 ohm resistor, and then
15K ohm resistor to ground. These passive components should be placed as close to
VT82C686A as possible
I
Connect to the corresponding USB(0) over-current detection voltage divider.
I
IO
IO
Connect to USB(1) connector. 47pF capacitor to ground with 27 ohm resistor, and then
15K ohm resistor to ground. These passive components should be placed as close to
VT82C686A as possible
I
Connect to the corresponding USB(1) over-current detection voltage divider.
I
IO
I
IO
Connect to USB(2) connector. 47pF capacitor to ground with 27 ohm resistor, and then
15K ohm resistor to ground. These passive components should be placed as close to
VT82C686A as possible
IO
Connect to USB(3) connector. 47pF capacitor to ground with 27 ohm resistor, and then
15K ohm resistor to ground. These passive components should be placed as close to
VT82C686A as possible
I
Connect to a 48MHz clock output of the system clock synthesizer.
SYSTEM MANAGEMENT BUS INTERFACE
I/O
IO
Connect to all devices on SMBus (I2C bus) except for the VGA port. 2.2K ohm pull-up to
VCC3. This resistor value is varied based on the bus loading.
I
10K ohm pull-up to 3VSB (3.3V stand-by power source).
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
Connection
Connection
83
Signal Connectivity and Design Checklist

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