Socket-370 Host Interface To North Bridge; Figure 2-34. Socket-370 Host Interface Topology Example - VIA Technologies Apollo Pro133A Design Manual

Technologies, Inc.
We Connect We Connect

2.4.1.2 Socket-370 Host Interface to North Bridge

The recommended topology for the Socket-370 host signals to North Bridge (VT82C694X) is shown in Figure 2-34. For signal
quality considerations, the trace length of the host signals should be minimized. 56 ohm pull-ups to VTT near the Socket-370
CPU are required.
•
It is recommended to route all host signals to VT82C694X in equal length and as short as possible. A minimum of 5 mils
in width and a minimum of 10 mils in spacing are required for those host signals. Wide traces for VTT pull-ups are
recommended.
•
There is no stub before traces L1 and L2. Two traces directly come out the pin of the Socket-370. The location of these
56 ohm resistor networks should be as close to Socket-370 CPU as possible.
•
The most qualified range of the L1 trace length is between 1.5 inches and 4.5 inches. The trace length of L2 should be
less than 2 inches.
VT82C694X
(North Bridge)
A[31..3]
D[63..0]
ADS#
BNR#
DBSY#
DRDY#
HIT#
HITM#
HREQ[4..0]#
HTRDY#
RS[2..0]#
BPRI#
BREQ0#
DEFER#
CPURST#
HLOCK#
A layout example for the host interface between the Socket-370 CPU and the VT82C694X chip is shown in Figure 2-35. The
VTT rail (a minimum of 200 mils wide) covering three sides of the Socket-370 on the component layer can provide a sufficient
GTL+ termination voltage supply path in Figure 2-35 (a).
Preliminary Revision 0.5, November 19, 1999
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
56 ohm
L2 < 2"
1.5 < L1 < 4.5"
L1

Figure 2-34. Socket-370 Host Interface Topology Example

42
VTT
Motherboard Design Guidelines
Socket-370
CPU
A[31..3]
D[63..0]
ADS#
BNR#
DBSY#
DRDY#
HIT#
HITM#
REQ[4..0]#
TRDY#
RS[2..0]#
BPRI#
BR0#
DEFER#
RESET#
LOCK#