Ide; Figure 2-58. Isa Bus Sa[15:0] / Sdd[15:0] Sharing Circuitry - VIA Technologies Apollo Pro133A Design Manual

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2.5.6 IDE

Both Primary and secondary IDE channels have their own control signals. The Primary IDE channel has a dedicated data bus.
However, the secondary IDE data bus is multiplexed with an Audio/Game port or it can share ISA address bus SA[15:0] as
SDD[15:0]. The two options are listed below for selecting the secondary IDE data bus.
•
Option 1: The secondary IDE data bus uses its own bus SDD[15:0] sharing with an Audio/Game port when the SPKR pin
is strapped low. No Audio/Game port is supported in this case since these functions are shared with the SDD[15..0] pins.
•
Option 2: The secondary IDE data bus shares ISA address bus SA[15:0] as SDD[15:0] through two 74F245 transceivers
when the SPKR pin is strapped high. The sharing circuitry is shown in Figure 2-58. Audio/Game port functions are
enabled on the SDD[15:0] pins.
SDD[15..0]
(From VT82C686A
& to Secondary IDE)
-SOE
(From VT82C686A)
-MASTER
(From VT82C686A)
Note: These 74F245 Transceivers are optional if ISA bus load is not a concern.
Preliminary Revision 0.5, November 19, 1999
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
SDD0
2
SDD1
3
SDD2
4
SDD3
5
SDD4
6
SDD5
7
SDD6
8
SDD7
9
19
1
SDD8
2
SDD9
3
SDD10
4
SDD11
5
SDD12
6
SDD13
7
SDD14
8
SDD15
9
19
1

Figure 2-58. ISA Bus SA[15:0] / SDD[15:0] Sharing Circuitry

U1
18
A1 B1
17
A2 B2
16
A3 B3
15
A4 B4
14
A5 B5
13
A6 B6
12
A7 B7
11
A8 B8
OE#
DIR
74F245
U2
18
A1 B1
17
A2 B2
16
A3 B3
15
A4 B4
14
A5 B5
13
A6 B6
12
A7 B7
11
A8 B8
OE#
DIR
74F245
66
SA0
SA[15..0]
SA1
SA2 (To ISA slots)
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
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