Technologies, Inc.
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
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2.2.5.1 Single Slot-1 Processor Capacitive Decoupling
Figure 2-10 shows a suggested decoupling capacitor placement for the Slot-1 CPU. The isolation region between any two of the
VCC_CORE (Core voltage 2.1V~3.3V) island, the VCC3 (I/O voltage 3.3V) island, the VTT (GTL+ termination voltage 1.5V)
island and the VCC5 (5V) should be at least 30 mil wide. An island can be an entire power plane or a portion of a power plane
that has been divided. The high frequency decoupling capacitors (0.1uF and 1.0uF) should be located as close to the power and
ground pins of the Slot-1 as possible.
Figure 2-10. Decoupling Capacitor Placement for Single Slot-1 Processor
Notes:
1. The white round dot represents the power pin of the specified power island. For example, there are four VTT power pins on the
VTT island. (Slot-1 CPU power pins: VCC_CORE x 19, VTT x 4, VCC3 x 3 and VCC5 x 1)
2. Recommended numbers of the decoupling capacitors for each power plane are shown in Figure 2-10.
Preliminary Revision 0.5, November 19, 1999
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Motherboard Design Guidelines