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5.2 VT82C694X Apollo Pro133A North Bridge
The connectivity for each signal of the VT82C694X North Bridge is listed in Table 5-1. Motherboard designers can use this table
as a quick reference to review their schematics.
Signal Name
ADS#
IO (GTL+) Connect to Slot-1 CPU. Or connected to Socket-370 CPU with 56 ohm termination to VTT.
BNR#
IO (GTL+) Same as the above.
BPRI#
IO (GTL+) Same as the above.
BREQ0#
CPURST#
DBSY#
IO (GTL+) Same as the above.
DEFER#
IO (GTL+) Same as the above.
DRDY#
IO (GTL+) Same as the above.
HA[31:3]#
IO (GTL+) Same as the above.
HD[63:0]#
IO (GTL+) Same as the above.
HIT#
IO (GTL+) Same as the above.
HITM#
HLOCK#
HREQ[4:0]#
IO (GTL+) Same as the above.
HTRDY#
IO (GTL+) Same as the above.
RS[2:0]#
IO (GTL+) Same as the above.
Signal Name
MAA[14:0]
MAB[13:11]#, MAB10,
MAB[9:0]#
MD[63:0]
MECC[7:0]
RASA[5:0]# / CSA[5:0]#
RASB[5:0]# / CSB[5:0]#
CASA[7:0]# / DQMA[7:0]#
CASB5# / DQMB5#
CASB1# / DQMB1#
SRASA#
SCASA#
SWEA# / MWEA#
SRASB#
SCASB#
SWEB# / MWEB#
CKE[5:4] / CSA[7:6]#
CKE[3:2] / CSB[7:6]#
CKE1 / GCKE#
CKE0 / FENA
Preliminary Revision 0.5, November 19, 1999
Table 5-1. VT82C694X North Bridge Connectivity
I/O
O (GTL+) Same as the above.
O (GTL+) Same as the above.
I (GTL+) Same as the above.
I (GTL+) Same as the above.
I/O
O
Connect to DIMM1 and DIMM2.
O
Connect to DIMM3 for 3-DIMM case. Or connect to DIMM3 and DIMM4 for 4-DIMM
case.
IO
Connect to each DIMM.
IO
Same as the above.
O
Connect to DIMM1, DIMM2 and DIMM3. (two to each)
O
Same as the above.
O
Connect to each DIMM.
O
Connect to DIMM3 for 3-DIMM case. Or connect to DIMM3 and DIMM4 for 4-DIMM
case.
O
Same as the above.
O
Connect to DIMM1 and DIMM2.
O
Same as the above.
O
Same as the above.
O
Connect to DIMM3 for 3-DIMM case. Or connect to DIMM3 and DIMM4 for 4-DIMM
case.
O
Same as the above.
O
Same as the above.
O
CKE[5:4] connected to DIMM3 for 3-DIMM case. CSA[7:6]# connected to DIMM4 for 4-
DIMM case.
O
CKE[3:2] connected to DIMM2 for 3-DIMM case. CSB[7:6]# connected to DIMM4 for 4-
DIMM case.
O
CKE1 connected to DIMM1 for 3-DIMM case.
O
CKE0 connected to DIMM1 for 3-DIMM case.
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
CPU INTERFACE
Connection
DRAM INTERFACE
Connection
78
Signal Connectivity and Design Checklist
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