Chipset Power And Ground Layout Recommendations; Figure 2-18. Vt82C694X Power And Ground Layout - VIA Technologies Apollo Pro133A Design Manual

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2.2.7 Chipset Power and Ground Layout Recommendations

This section shows the recommended layout of the power plane and the ground plane on each layer for the two VIA BGA chips
(VT82C694X and VT82C686A). Appropriate power and ground distributions for component, ground, power and solder layers can
provide a better power and ground circuit to the chip. Two examples of power and ground layout and signal routings for both
VT82C694X and VT82C686A are shown in Figures 2-18 and 2-19 respectively.
(a) Component Layer
(c) Power Layer
Notes:
1. In Figure 2-18 (b) and (c), a black round dot represents a via with no connection to the specified layer and a white round dot
represents a via with a connection to the specified layer. For example, the white round dots in Figure 2-18 (b) are ground
connection vias and the white round dots in Figure 2-18 (c) can be VDDQ or VCC3 connection vias.
2. The square-like rail in the center area of the VT82C694X chip on the component layer in Figure 2-18 (a) connects to ground.
The center square-like block representing an unused routing area connects to ground in Figure 2-18 (d).
3. Pin A1 of the VT82C694X chip is located at the upper-left corner.
4. The left area surrounded by the isolation (black line) is the AGP VDDQ power plane in Figure 2-18 (c).
Preliminary Revision 0.5, November 19, 1999
Design Guide - VT82C694X Apollo Pro133 with VT82C686A

Figure 2-18. VT82C694X Power and Ground Layout

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(b) Ground Layer
(d) Solder Layer
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