Super South (Vt82C686A) Layout And Routing Guidelines; Usb Controller; Figure 2-52. Usb Over-Current Scan Logic; Table 2-12 Universal Serial Bus (Usb) Signals - VIA Technologies Apollo Pro133A Design Manual

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2.5 Super South (VT82C686A) Layout and Routing Guidelines

2.5.1 USB controller

The Universal Serial Bus (USB) provides a bi-directional, isochronous, hot-attachable Plug and Play serial interface for adding
external peripheral devices such as game controllers, communication devices, and input devices on a single bus. Brief descriptions
of the USB signals of the VT82C686A are listed in Table 2-12. The VT82C686A provides four USB ports. Only port 0 and port
1 have over-current detect pins (OC0# and OC3#), however, the over current status of port 2 and port 3 can still be sensed for
implementing 4 USB ports. The VT82C686A will scan SD[3:0] during the ISA refresh period as OC[3:0]# of the USB ports. If
this over-current scan logic is implemented, pins OC0# and OC1# may be left open or used for alternative functions. A schematic
drawing for four over-current scans is illustrated in Figure 2-52 below.
Signal Name
USBP0+
USBP0-
OC0#
USBP1+
USBP1-
OC1#
USBP2+
USBP2-
USBP3+
USBP3-
USBCLK
OC0#
OC1#
OC2#
OC3#
(From USB Ports)
RFSH#
(From VT82C686A)
Preliminary Revision 0.5, November 19, 1999

Table 2-12 Universal Serial Bus (USB) Signals

I/O
IO
USB Port 0 Data +
IO
USB Port 0 Data -
I
USB Port 0 Over Current Detect. Port 2 is disabled if this input is low.
IO
USB Port 1 Data +
IO
USB Port 1 Data -
I
USB Port 1 Over Current Detect. Port 1 is disabled if this input is low.
IO
USB Port 2 Data +
IO
USB Port 2 Data -
IO
USB Port 3 Data +
IO
USB Port 3 Data -
I
USB clock. Connected to a 48MHz clock output of the system clock synthesizer.

Figure 2-52. USB Over-Current Scan Logic

Design Guide - VT82C694X Apollo Pro133 with VT82C686A
Description
U1
2
18
1A1
1Y1
4
16
1A2
1Y2
6
14
1A3
1Y3
8
12
1A4
1Y4
11
9
2A1
2Y1
13
7
2A2
2Y2
15
5
2A3
2Y3
17
3
2A4
2Y4
1
19
1G
2G
74F244
59
SD0
SD[7..0]
SD1
SD2
(To VT82C686A)
SD3
VCC
Motherboard Design Guidelines

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