Str Power Plane Control; Figure 2-63. Str State Power Plane Control Application Circuit; Table 2-14. Resume Events Supported In Different Power States - VIA Technologies Apollo Pro133A Design Manual

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2.5.7.2 STR Power Plane Control

VT82C686A controls the system entering the various suspend states through the suspend control signals listed in Table 2-14.
Three power plane control signals (SUSA#, SUSB# and SUSC#) are provided to turn off more system power planes as the system
moves to deeper power-down states from normal operation to POS (only SUSA# asserted), to STR (both SUSA# and SUSB#
asserted), and to STD (all three SUS# signals asserted).

Table 2-14. Resume Events Supported in Different Power States

Power State
On
POS
STR
STD / Soft-off
Mechanical off
Upon initiation of suspend, VT82C686A will assert the SUSST1# and SUS[A:C]# signals in a plane defined sequence to switch
the system into the desired power state. The SUSA#, SUSB# and SUSC# signals can be used to control various power planes in
the system. For example, SUSC# is typically connected to PS-ON (pin 14) of the ATX power supply connector through an
inverter to control the remote-off function.
Figure 2-63 shows an application circuit example on STR power plane control. When SUSB# is not asserted, Q1 is turned on and
Q2 is turned off. And V_DIMM power source is supplied by VCC3 in normal operation. When SUSB# is asserted, Q1 is turned
off and Q2 is turned on. And V_DIMM power source is supplied by 3V3SB (3.3V suspend power) during STR state.
-RSMRST
PW_GOOD
1
2
-SUSB
4
-SUSC
5
Notes:
1. Components U1, U2, U3 and U4 are powered by +5V standby power source.
2. V_DIMM represents the power source to DIMM modules.
3. R
of Q1 (N-channel MOSFET) should be as low as possible. RDS(ON)= 0.008 ohm at VGS=10V for FDS6670A.
DS(ON)
Note that these signals are associated with a particular type of suspend mode and power plane for descriptive purposes in this
section. Using these signals, the system designer can control any type of function desired.
Preliminary Revision 0.5, November 19, 1999
RSMRST#
1
1
1
1
0
U2A
U1A
1
3
3
2
AHC08
AHC00
U3A
U1B
1
3
6
2
AHC32
AHC00

Figure 2-63. STR State Power Plane Control Application Circuit

Design Guide - VT82C694X Apollo Pro133 with VT82C686A
SUSST1#
SUSA#
0
0
0
0
0
U4
P
Q
D
R1 1K
Q
C
MMBT3904
AHCT74
VCC3
71
SUSB#
SUSC#
1
1
1
0
1
1
0
0
1
0
0
0
0
0
0
+12V
R2
4.7K
Q2
G
NDC632P
P-MOSFET
Q3
G
Q1
S
D
FDS6670A
N-MOSFET
Motherboard Design Guidelines
3V3SB
D
S
V_DIMM

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