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2.4.3.2 Vref Characteristics for AGP 4X Mode
Vref is a DC voltage reference signal used to set the input sense level on the AGP bus. Vref is set at 0.5 x VDDQ (between 0.48 x
VDDQ and 0.52 x VDDQ) for AGP 4X mode. Referring to Figure 2-46 for an AGP 4X mode implementation, two unidirectional
Vref pins are provided in the connector. These pins connect Vref between the add-in card graphics chip and the VT82C694X chip.
Typical values of the resistors and capacitors in the voltage divider network are shown in the figure. The Vref resistor divider
network must be placed away from critical and noisy signals, especially 3.3V swing signals. Guard (ground) trace should be
implemented if adjacent to 3.3V swing signal cannot be avoided. To avoid signal crosstalk from other signal lines, the trace to the
Vref input pin should be kept away from other noisy traces in the board layout. Decoupling capacitors should not be implemented
directly on Vref for better tracking between VDDQ and Vref.
AGP Add-in Card
Graphics
Chip
Vref
Note: TYPEDET# provided by the AGP add-in card is used to determine the VDDQ (1.5V or 3.3V)
through a switching or linear regulator.
2.4.3.3 AGP VDDQ Power Delivery
AGP 2X (or 1X) mode can operate in either 3.3V interface or 1.5V interface. However, AGP 4X mode uses only 1.5V interface.
For sharing of both AGP interfaces, switching between two different voltage supplies (3.3V and 1.5V) for the AGP slot should be
taken into account. Refer to Figure 2-46 above for the AGP 2X and 4X mode sharing circuit. Pin A2 (TYPEDET#) of the AGP
slot is used to determine the AGP operating voltage (VDDQ) through the voltage switching circuit. For example, the AGP
interface is 1.5V if the TYPEDET# is shorted to ground (or activated to low) on the add-in card side. However, when TYPEDET#
is open (not connected to any power rail or signal), the voltage switching circuit outputs 3.3V VDDQ. At the same time, Vref of
0.4 x VDDQ for 3.3V signaling is internally generated in VT82C694X and external Vref of 0.5 x VDDQ for 1.5V signaling on
board is disconnected.
In the case of a universal 1.5V / 3.3V signaling system, an on-board voltage regulator is preferred. The voltage level of the
regulator is controlled by the TYPEDET# signal which is controlled by the add-in card.
Preliminary Revision 0.5, November 19, 1999
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
AGP (4X)
Connector
(0.5 x VDDQ)
VDDQ
560 pF
1K ohm
75 ohm
75 ohm
1K ohm
560 pF
TYPEDET#
Figure 2-46. AGP 2X and 4X Mode Sharing Circuit
Motherboard
VDDQ
560 pF
1K ohm
75 ohm
B66
75 ohm
1K ohm
560 pF
(0.5 x VDDQ)
A66
Voltage-
A2
Switching
Circuit
53
VT82C694X
(North Bridge)
(0.4 x
VDDQ)
Vref
Vref
VDDQ
Motherboard Design Guidelines
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