Figure 2-60. Ultra Dma/66 Placement And Routing Example - VIA Technologies Apollo Pro133A Design Manual

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Ultra DMA/66 Interface Layout Guidelines
VT82C686A supports Ultra DMA/66 IDE interfaces on both Primary IDE channel (IDE1) and Secondary IDE channel (IDE2). A
Micro-ATX component placement example for implementing the Ultra DMA/66 interface (option 2) is shown in Figure 2-60. The
detailed placement for the VT82C686A chip and two IDE connectors is illustrated in the lower left corner of the figure. The major
difference from the former placement is the shorter distance between VT82C686A and primary IDE and Secondary IDE
connectors. The shorter length for both IDE data buses is required because this bus is running at a high speed (66MHz). In order
to fulfill this requirement, the VT82C686A chip can be lowered and both IDE connectors can be shifted to the left. Recommended
layout guidelines are listed below.
Preliminary Revision 0.5, November 19, 1999
For IDE1
VT82C
686A
2
4
5
2
4
5
For IDE2 data bus

Figure 2-60. Ultra DMA/66 Placement and Routing Example

Design Guide - VT82C694X Apollo Pro133 with VT82C686A
Back
Panel
VT82C
694X
IDE1
IDE2 FDC
68
Socket 370
Motherboard Design Guidelines