System Management Bus Interface; Figure 2-57. System Management Bus Interface - VIA Technologies Apollo Pro133A Design Manual

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2.5.5 System Management Bus Interface

The I2C bus signal pair of the VT82C686A will handle all I2C buses to other on-board devices such as the Clock Synthesizer and
the three DIMM slots. A block diagram of System Management Bus Interfaces is shown in Figure 2-57. It is recommended to
place both pull-ups at the end of the I2C bus.
•
Adding 68pF capacitors in Figure 2-57 for the pair at the end device is essential since the I2C bus travels a long way and
might pick up noise along the route.
VT82C686A
(South Bridge)
SMBCLK
SMBDATA
Preliminary Revision 0.5, November 19, 1999
Design Guide - VT82C694X Apollo Pro133 with VT82C686A
Clock DRAM
Synthesizer DIMMs

Figure 2-57. System Management Bus Interface

65
TV TV
Encoder Decoder
VCC3
2.2K 2.2K
ohm ohm
The end
Device 68 pF 68 pF
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