8.2.3.1.2 Advanced settings −> System −> Audio Clock
This page allows defining the X/LINK sampling clock source:
Device clock
The clock source can be:
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Internal: on-board clock
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Extracted from an AES/3 input (not available on X/LINK-AES67)
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A PTP clock (AES67, RAVENNA)
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A Livewire clock
The clock sampling frequency value is set from
Master clock
Allows defining if the codec generates a PTP clock.
8.2.3.1.2.1 PTP clock source
The following parameters appear when the mode "PTP AES67 Slave" is selected:
IQOYA X/LINK range user manual
Preferences−>Audio setup.
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