Siemens SIDOOR ATD4 W Series System Manual page 98

SIDOOR functions
4.3 Extended functions
Example logic
The following figure shows an example logic. In the example logic the level-controlled outputs
of the digital inputs DI3 and DI2 are linked via the FBLOCK "AND1" with the FBLOCK "Error
acknowledgement".
Figure 4-9 Example logic
Drive orders
In parallel with logical signal combination, a drive order can be assigned to the Q outputs. Door
commands that are assigned to the outputs are only active as long as the assigned output is
active (jog mode). A drive order is composed of a door command "DCMD" and an optional door
command expansion bit "DCMD expansion".
Drive order = door command + door command expansion bit
Both commands are expressed as 16-bit values. The structure of the DCMD and DCMD expansion
bit fields corresponds to the technology control world 1 (TSW 1) signals of the same names, see
Table A-15 Technology control word 1 (TSW1) (Page 319). The "LB" and "DCOPS" and expansion
bits are not evaluated here.
Example
• The value 0x0301
• The value 0x0215
The default command mode is defined by the p100 parameter.
For the controllers ATD420W, ATD430W command input via the bus system is activated in the
factory setting. Parameter p100 is set to the value 0. This means that the FBLOCK drive orders
can only be executed in the drive state "S4: Z_OPERATION" (see Figure 5-4 Sequential control
state graph (Page 163)).
96
15 ... 8
DCMD
corresponds to the "close slowly" drive order.
hex
corresponds to the "slow, partial opening in NDG mode" drive order.
hex
7 6 5 4 3
DCMD expansion
ATD4xxW for industrial applications
System Manual, 06/2022, A5E51901827B AA
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