The following table shows the maximum supported
multiple flash devices. The maximum
oscillator as the clock source.
Table 33.
Maximum AS_CLK Frequency as a Function of Board Capacitance Loading and Clock Source
This table is preliminary.
Capacitance Loading (pF)
10
30
37
80
140
Related Information
•
MSEL Settings
•
Intel Agilex Device Data Sheet
3.2.4. AS Configuration Timing Parameters
Figure 40.
AS Configuration Serial Output Timing Diagram
Intel
®
Agilex
™
Configuration User Guide
108
frequency also depends on whether you use the
AS_CLK
on page 29
T
T
do (min)
dcsfrs
T
nCSO
do (max)
AS_CLK
AS_DATA
frequency for a range of capacitance loading values when using
AS_CLK
Maximum Supported AS_CLK (MHz)
OSC_CLK_1 (MHz)
166/125
100
71.5
50
25
OUT0
OUT1
3. Intel Agilex Configuration Schemes
683673 | 2021.10.29
or internal
OSC_CLK_1
Internal Oscillator (MHz)
115
77
77
58
25
T
dcslst
OUTn
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