Intel Agilex Series Configuration User Manual page 70

Figure 23. FPGA Configuration Tab of the PFL II IP
You use the Programming File Generator dialog box to specify the Start address of the option bits. Specify your flash
device using Add Device on the Configuration Tab of the Programming File Generator dialog box. Then click OPTIONS
and EDIT to specify the Start address for the option bits. This Start address must match the address you specify for What
is the byte address of the option bits, in hex? when specifying the PFL II IP parameters.
The Intel Quartus Prime Programming File Generator generates the information for the
the to
.sofs .pofs
layout for a
.pof
Intel ® Agilex ™ Configuration User Guide
70
FPGA Configuration
Option bits
. The value for the version for Intel Agilex is
.pof
using all eight pages. This example stores the
3. Intel Agilex Configuration Schemes
.pof
. The following table shows an example of page
0x05
version at 0x80.
.pof
683673 | 2021.10.29
version when you convert
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