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Renesas RH850 Series Application Note

Renesas RH850 Series Application Note

Can receive procedure (can fd mode)
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RH850 Series
CAN Receive Procedure (CAN FD Mode)
Summary
This document describes an example of a procedure for receiving CAN using the RH850 series. Please refer to the
notes in the latest user's manual hardware edition for the settings of each register.
Operation Confirmed Devices
This document applies to the RH850 series.
The variables described in the text are as follows.
RS-CAN FD channel number
GAFLIDj, GAFLMj, GAFLP0j,
GAFLP1j Register numbers
Transmit/Receive FIFO buffer
number
Receive FIFO buffer number
Receive buffer number
Transmit buffer number
RAM test number
GAFLCFGi、GTINTSTSi
register number
Number of each status register
The functions marked with "★" in the text are applicable to cases where 2 or more channels are installed.
In the text, CFD is omitted from the register names.
R01AN6028EJ0100 Rev.1.0
May 10, 2017
Table 1-1 Target Devices and Variables
Variable
RH850/E2x RH850/E1M-S2 RH850/P1M-E
m
j
k
x
q
p
r
i
y
Target MCU
0~4
0~3
0~15
0~15
0~14
0~11
0~7
0~7
0~79
0~63
0~79
0~63
0~63
0~63
0
0
0~2
0,1
Application Note
R01AN6028EJ0100
Rev.1.0
0~2
0~15
0~8
0~7
0~47
0~47
0~63
0
0,1
Page 1 of 26

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Summary of Contents for Renesas RH850 Series

  • Page 1 CAN Receive Procedure (CAN FD Mode) Summary This document describes an example of a procedure for receiving CAN using the RH850 series. Please refer to the notes in the latest user's manual hardware edition for the settings of each register.
  • Page 2: Table Of Contents

    RH850 Series CAN Receive Procedure (CAN FD Mode) Contents Receive Function ......................3 Receive Using Receive Buffers ..................4 Receive Using Receive FIFO Buffers ................7 Receive Using Transmit/Receive FIFO Buffers ............... 12 CAN-related Interrupt Processing ................... 18 Precautions for Processing Flow ..................19 Appendix ........................
  • Page 3: Receive Function

    RH850 Series CAN Receive Procedure (CAN FD Mode) Receive Function The functions that can be used when receiving CAN messages are shown below. For details on each process, refer to the following chapters. • ・Receive using the receive buffer • ・Receive using the receive FIFO buffer •...
  • Page 4: Receive Using Receive Buffers

    RH850 Series CAN Receive Procedure (CAN FD Mode) Receive Using Receive Buffers Receive buffer q shared by all channels is available. Since the message stored in the receive buffer with the same number is overwritten, the latest received data can be read.
  • Page 5 RH850 Series CAN Receive Procedure (CAN FD Mode) Receive Buffer Read Procedure Figure 2-2 shows the procedure for reading the receive buffer. START Is there a receive buffer that received a new message? Clear the receive buffer receive completion flag 、...
  • Page 6 RH850 Series CAN Receive Procedure (CAN FD Mode) 6. If DLC replacement is enabled after filtering by the reception rule (the DCE bit of the GCFG register is “1”, DRE bit is “1”), the received message matches the DLC set value in the reception rule table (the GAFLDLC[3:0] bit of the GAFLP0_j register) that matches the received message is stored.
  • Page 7: Receive Using Receive Fifo Buffers

    RH850 Series CAN Receive Procedure (CAN FD Mode) Receive Using Receive FIFO Buffers There are 8 receive FIFO buffers shared by all channels. Messages can be stored in each receive FIFO buffer for the number of buffers. When a received message is stored in the receive FIFO buffer, the value of the corresponding message count display counter (the RFMC [7: 0] bit of the RFSTSx register) is incremented.
  • Page 8 RH850 Series CAN Receive Procedure (CAN FD Mode) Receive FIFO Buffer Read Procedure Figure 3-2 shows the procedure for reading the receive FIFO buffer, and Figure 3-3 and Figure 3-4 show the procedure for enabling and prohibiting the use of the receive FIFO buffer.
  • Page 9 RH850 Series CAN Receive Procedure (CAN FD Mode) 5. If the DLC of the received message (value of the RFDLC [3: 0] bit of the RFPTRx register) is less than the payload storage size of the receive FIFO buffer, "H'00" can be read for the data byte (RFDFb_x register) for which no data is set.
  • Page 10 RH850 Series CAN Receive Procedure (CAN FD Mode) START Is the receive FIFO buffer empty? 、 、 Enable use of receive FIFO buffer* 【Note】 1. Rewrite to enable/disable the receive FIFO buffer (the RFE bit of the RFCCx register) in the global operation mode or global test mode.
  • Page 11 RH850 Series CAN Receive Procedure (CAN FD Mode) Receive FIFO Interrupt Processing 3.2.1 Receive FIFO Interrupt Processing If the receive FIFO interrupt is enabled, the receive FIFO interrupt is generated when the condition selected in the RFIM bit setting of the RFCCx register is satisfied.
  • Page 12: Receive Using Transmit/Receive Fifo Buffers

    RH850 Series CAN Receive Procedure (CAN FD Mode) Receive Using Transmit/Receive FIFO Buffers The transmit/receive FIFO buffer can be used in receive mode, transmit mode, or gateway mode (only receive mode is described in this chapter). There are 3 transmit/receive FIFO buffers per channel dedicated to each channel. The transmit/receive FIFO buffer set to receive mode can store as many messages as the number of buffers, just like the receive FIFO buffer.
  • Page 13 RH850 Series CAN Receive Procedure (CAN FD Mode) Figure 4-1 shows the receive operation of the transmit/receive FIFO buffer. ※ : Number of transmit / receive Transmit/receive FIFO buffer stages : 4 FIFO buffer k An interrupt occurs when a message is stored until 8/8 ※...
  • Page 14 RH850 Series CAN Receive Procedure (CAN FD Mode) Transmit/receive FIFO Buffer Read Procedure Figure 4-2 shows the procedure for reading the transmit/receive FIFO buffer, and Figure 4-3 and Figure 4-4 show the procedure for enabling and prohibiting the use of the transmit/receive FIFO buffer.
  • Page 15 RH850 Series CAN Receive Procedure (CAN FD Mode) 5. If DLC replacement is enabled after filtering by the reception rule (the DCE bit of the GCFG register is “1”, DRE bit is “1”), the DLC set value in the reception rule table (the GAFLDLC bit of the GAFLP0_j register) that matches the received message is stored.
  • Page 16 RH850 Series CAN Receive Procedure (CAN FD Mode) START Is the transmit/receive FIFO buffer empty? 、 、 Enable use of transmit/receive FIFO buffer* 【Note】 1. Rewrite to enable/disable the transmit/receive FIFO buffer (the CFE bit of the CFCCk register) in the global operation mode or global test mode.
  • Page 17 RH850 Series CAN Receive Procedure (CAN FD Mode) Transmit/Receive FIFO Buffer (Receive Mode) Interrupt Processing 4.2.1 Transmit/receive FIFO Reception Completion Interrupt Processing If the transmit/receive FIFO interrupt is enabled, the transmit/receive FIFO interrupt is generated when the condition selected in the CFIM bit setting of the CFCCk register is satisfied.
  • Page 18: Can-Related Interrupt Processing

    RH850 Series CAN Receive Procedure (CAN FD Mode) CAN-related Interrupt Processing flag must be cleared to “0”. For CAN-related flags related to each interrupt When using interrupts, the interrupt source flag on the interrupt control side, refer to "7.1 CAN-related interrupt s".
  • Page 19: Precautions For Processing Flow

    RH850 Series CAN Receive Procedure (CAN FD Mode) Precautions for Processing Flow About Functions In this application note, there is a part that is functionalized even in the processing of single line, but this is only described as a function to clarify the processing for each function. When you actually create a program, it is not necessary to make it functional.
  • Page 20: Appendix

    RH850 Series CAN Receive Procedure (CAN FD Mode) Appendix CAN-related Interrupt Sources Table 7-1 shows the CAN-related interrupt source R01AN6028EJ0100 Rev.1.0 Page 20 of 26 May 10, 2017...
  • Page 21 RH850 Series CAN Receive Procedure (CAN FD Mode) Interrupt Occurrence Source Configuration Interrupt Source Request Clear (Enable) Unit * Method * Global receive Receive FIFOx RFIE bit of the When the condition set by the RFIGCV[2:0] RFIF flag in the...
  • Page 22 RH850 Series CAN Receive Procedure (CAN FD Mode) Table 7-1 CAN-related Interrupt Sources 【Note】 The interrupt request flag and interrupt enable bit in the interrupt function are not described. For details, refer to the interrupt chapter in the hardware chapter of each user's manual.
  • Page 23 RH850 Series CAN Receive Procedure (CAN FD Mode) Operation when Receive Buffer is Completed and Receive (Transmit/receive) FIFO Buffer is Full Table 7-2 shows the operation when a message to be stored is received when the reception buffer reception is completed, and the reception FIFO buffer, the transmit/receive FIFO buffer (reception mode) are full.
  • Page 24 RH850 Series CAN Receive Procedure (CAN FD Mode) About Receive Rule Table The receive rule table is a table with rules for filtering received messages. The selected messages are stored in the specified buffer by data processing using the receive rule table.
  • Page 25 RH850 Series CAN Receive Procedure (CAN FD Mode) Figure 7-1 Filtering Image by Receive Rule Table Our Company’s Website and Inquiry Website http://japan.renesas.com/ Inquiry http://japan.renesas.com/contact/ R01AN6028EJ0100 Rev.1.0 Page 25 of 26 May 10, 2017...
  • Page 26 RH850 Series CAN Receive Procedure (CAN FD Mode) All trademarks and registered trademarks are the property of their respective owners. Revision History Description Rev. Date Page Summary — 2017.5.10 Initial edition R01AN6028EJ0100 Rev.1.0 Page 26 of 26 May 10, 2017...
  • Page 27 Precautions for use of the product This section describes the "Precautions" that apply to all microcontroller products. Please refer to this document and the Technical Update for precautions on individual products. Treatment of unused pins [Caution] Please dispose of unused pins according to "Handling of unused pins" in the text. The impedance of the input pins of CMOS products is generally high impedance.

This manual is also suitable for:

Rh850/e2 seriesRh850/e1m-s2Rh850/p1m-e