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3.2.6 Modem control register
This register (MCR: 5000_0014H (UART0), 5001_0014H (UART1), 5002_0014H (UART2)) controls the interface
with modems (and other peripheral devices).
15
14
7
6
Reserved
Name
R/W
Reserved
R
Reserved
R
AFE *
R/W
Reserved
R/W
OUT2
R/W
OUT1
R/W
RTS
R/W
DTR
R/W
* If a register value is changed during operation, normal operation is not guaranteed. In this case, initialize the
register.
CHAPTER 3 REGISTERS
13
12
Reserved
5
4
AFE
Reserved
Bit
After Reset
15:8
0
Reserved. When these bits are read, 0 is returned for each bit.
7:6
0
Reserved. Written data is ignored.
5
0
Specifies whether to enable auto-flow control (auto-CTS and auto-
RTS).
0: Disables auto-flow control.
1: Enables auto-flow control.
Auto-flow operation is controlled in detail by using bit 1 of this register
and bit 6 of the HCR0 register.
4
0
Reserved.
3
0
Selects the level of the general-purpose output OUT2Z (internal
signal).
0: High (inactive).
1: Low (active)
In local loopback mode, this bit controls DCDZ (internal signal) input.
2
0
Selects the level of the general-purpose output OUT1Z (internal
signal).
0: High (inactive)
1: Low (active)
In local loopback mode, this bit controls RIZ (internal signal) input.
1
0
Selects the level of UARTx_RTSB pin output (transmission request)
when auto-RTS is not used (bit 5 = 0).
0: High (inactive)
1: Low (active)
In local loopback mode, this bit controls the UARTx_CTSB input pin.
0
0
Selects the level of DTRZ (communication link establishment ready,
internal signal) output.
0: High (inactive)
1: Low (active)
In local loopback mode, this bit controls DSRZ (internal signal) input.
User's Manual S19262EJ3V0UM
11
10
3
2
OUT2
OUT1
Function
9
8
1
0
RTS
DTR
23
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