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Memory Maps and Registers
5.5
Programmable Logic Device (PLD) Registers
5.5.1
PLD Revision Register
The MVME2500 provides a PLD revision register that is read by the system software to
determine the current version of the timers/registers PLD.
Table 5-4
REG
Bit
Field
OPER
RESET
Field Description
PLD_REV
5.5.2
PLD Year Register
The MVME2500 PLD provides an 8-bit register which contains the build year of the
timers/registers PLD.
Table 5-5
REG
Bit
Field
OPER
RESET
92
PLD Revision Register
PLD Revision Register - 0xFFDF0000
7
6
5
PLD Rev
R
03
8-bit field containing the current timer/register PLD revision. The
revision number starts at 01.
PLD Year Register
PLD Year Register - 0xFFDF0004
7
6
5
PLD Rev
R
0A
4
3
2
4
3
2
MVME2500 Installation and Use (6806800L01S)
Memory Maps and Registers
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