Page 1 MVME2500 Installation and Use P/N: 6806800L01S October 2021...
Page 2 Computing” and the SMART Embedded Computing logo are trademarks of SMART Modular Technologies, Inc. All other names and logos referred to are trade names, trademarks, or registered trademarks of their respective owners. These materials are provided by SMART Embedded Computing as a service to its customers and may be used for informational purposes only. Disclaimer* SMART Embedded Computing (SMART EC) assumes no responsibility for errors or omissions in these materials.
Page 3: Table Of Contents
3.3.2 On-board LEDs ........... . 45 MVME2500 Installation and Use (6806800L01S)
Page 4 System Memory ............71 MVME2500 Installation and Use (6806800L01S)
Page 5 Overview ............. . . 89 MVME2500 Installation and Use (6806800L01S)
Page 6 Using the Persistent Memory Feature ........111 MVME2500 Installation and Use (6806800L01S)
Page 7 Related Documentation ............129 B.1 SMART Embedded Computing Documentation ....... . 129 B.2 Manufacturers’...
Page 8 Table of Contents MVME2500 Installation and Use (6806800L01S)
Page 9 Battery Location ..........127 MVME2500 Installation and Use (6806800L01S)
Page 10 List of Figures MVME2500 Installation and Use (6806800L01S)
Page 11 PLD Sequence Register ..........93 MVME2500 Installation and Use (6806800L01S)
Page 12 Table 6-1 MVME2500 Specific U-Boot Commands ....... . . 112 Table 7-1 POR Configuration Settings .
Page 13: About This Manual
U-Boot system and MVME chassis. The purpose of this manual is to describe MVME2500 product and the services it provides. This manual includes description of MVME2500 product hardware, firmware and also information about operating system.
Page 14 Peripheral Component Interconnect extended PCI Mezzanine Card Input/Output Module Programmable Logic Device PCI Mezzanine Card (IEEE P1386.1) PrPMC Processor PCI Mezzanine Card Real-Time Clock Rear Transition Module SATA Serial AT Attachment SDHC Secure Digital Host Controller MVME2500 Installation and Use (6806800L01S)
Page 15 Repeated item for example node 1, node 2, ..., node 12 Omission of information from example/command that is not necessary at the time Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers) Logical OR MVME2500 Installation and Use (6806800L01S)
Page 16 Indicates an electrical situation that could result in moderate injury or death Indicates that when working in an ESD environment care should be taken to use proper ESD practices No danger encountered, pay attention to important information MVME2500 Installation and Use (6806800L01S)
Page 17 Updated Standard Compliances on page 21. Changed title of Section 3.4.1 to Front Panel Connectors. Edited Front Panel Serial Port (J4). 6806800L01F August 2011 Updated Figure “Component Layout” to include proper label for XMC connectors. Updated Safety Notes and Sicherheitshinweise. MVME2500 Installation and Use (6806800L01S)
Page 18 Chapter 3, On-board Connectors Added Chapter 4, Functional Description Applied editorial edits This version includes updates and revisions for the EA release of the MVME2500. Table 1.3. Added mechanical data. Table 4-3. Removed the following commands: brd_reset, irqinfo, mac. Added soft_reset.
Page 19: Safety Notes
Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. SMART Embedded Computing (SMART EC) intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete.
Page 20 Product Damage Only use injector handles for board insertion to avoid damage to the front panel and/or PCB. Deformation of the front panel can cause an electrical short or other board malfunction. MVME2500 Installation and Use (6806800L01S)
Page 21 Data Loss Exchanging the battery can result in loss of time settings. Backup power prevents the loss of data during exchange. Quickly replacing the battery may save time settings. MVME2500 Installation and Use (6806800L01S)
Page 22 PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent damage, do not use a screw driver to remove the battery from its holder. MVME2500 Installation and Use (6806800L01S)
Page 23: Sicherheitshinweise
Verletzungen oder Schäden am Produkt zur Folge haben. SMART Embedded Computing (SMART EC) ist darauf bedacht, alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich jedoch um ein komplexes Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im Handbuch enthaltenen...
Page 24 Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen auslösen. Verstellen Sie nur solche Schalter, die nicht mit 'Reserved' gekennzeichnet sind. Prüfen und ggf. ändern Sie die Einstellungen der nicht mit 'Reserved' gekennzeichneten Schalter, bevor Sie das Produkt installieren. MVME2500 Installation and Use (6806800L01S)
Page 25 Stellen Sie sicher, dass die Länge eines mit Ihrem Produkt verbundenen TPE-  Kabels 100 m nicht überschreitet. Das Produkt darf über die TPE-Stecker nur mit einem Sicherheits-  Kleinspannungs-Stromkreis (SELV) verbunden werden. Bei Fragen wenden Sie sich an Ihren Systemverwalter. MVME2500 Installation and Use (6806800L01S)
Page 26 Batteriehalter beschädigt werden. Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden. Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich. MVME2500 Installation and Use (6806800L01S)
Page 27: Introduction
Chapter 1 Introduction Overview The MVME2500 is a VME form-factor single-board computer based on the NXP QorIQ ® ® P2010 single core or P2020 dual core processors. A e500 v2 core QorIQ processor uses 45 nanometer technology which delivers an excellent performance to power ratio.The...
Page 28 Board Temperature Sensor – 8 KB VPD EEPROM – Two 64 KB User EEPROM VMEbus Interface Controller: Tsi148 PCI-X to VMEbus bridge with support for  VME64 and 2eSST protocols CPLD: Watchdog, timers, and registers  MVME2500 Installation and Use (6806800L01S)
Page 29: Standard Compliances
The following table provides the dimensions of the board. Table 1-2 Mechanical Data Feature Value Height 233.44mm (9.2 inches) Depth 160.0mm (6.3 inches) Front Panel Height 261.8mm (10.3 inches) Width 19.8mm (0.8 inches) Maximum Component Height 14.8mm (0.58 inches) MVME2500 Installation and Use (6806800L01S)
Page 30: Ordering Information
Introduction Introduction Ordering Information Refer to the data sheet for the MVME2500 for a complete list of available variants and accessories. Refer to or consult your local SMART Appendix B, Related Documentation Embedded Computing sales representative for the availability of other variants.
Page 31: Hardware Preparation And Installation
Installation instructions for the optional PMC/XMC modules and transitions modules are also included. A fully implemented MVME2500 consists of the base board and the following modules: PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility ...
Page 32: Requirements
Make sure that the board meets the following requirements when operated in your particular system configuration. 2.3.1 Environmental Requirements Operating temperatures refer to the temperature of the air circulating around the board and not to the component temperature. MVME2500 Installation and Use (6806800L01S)
Page 33: Table 2-1 Environmental Requirements
High humidity and condensation on the board surface causes short circuits. Do not operate the board outside the specified environmental limits. Make sure the board is completely dry and there is no moisture on any surface before applying power. MVME2500 Installation and Use (6806800L01S)
Page 34: Power Requirements
The power is measured when the board is in standby (Linux prompt) mode. Power will significantly increase when adding hard drives or a XMC/PMC card. The following table shows the power available when the MVME2500 is installed in either a three row or five row chassis and when PMCs are present.
Page 35: Equipment Requirements
Hardware Preparation and Installation 2.3.3 Equipment Requirements The following are recommended to complete a MVME2500 system: VMEbus system enclosure  System console terminal  Operating system (and/or application software)  Transition module and connecting cables  Configuring the Board The board provides software control over most options. Settings can be modified to fit the user's specifications.
Page 36: Installing Accessories
Installing Accessories 2.5.1 Rear Transition Module The MVME2500 does not support hot swap. Remove power to the rear slot or system before installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed before placing the transition module.
Page 37: Pmc/Xmc Support
1. Attach an ESD strap to your wrist. Attach the other end of the strap to the chassis as a ground. Make sure that it is securely fastened throughout the procedure. MVME2500 Installation and Use (6806800L01S)
Page 38: Installing And Removing The Board
This section describes the recommended procedure for installing the board in a chassis. Read all warnings and instructions before installing the board. The MVME2500 does not support hot swap. Power off the slot or system and make sure that the serial ports and switches are properly configured.
Page 39 6. Hold top and bottom edges of the board and exert minimal force when pulling the board from the chassis to prevent pin damage. 7. Carefully remove the board from the chassis and store the board in anti-static envelope. MVME2500 Installation and Use (6806800L01S)
Page 40: Completing The Installation
 Verify that hardware is installed and the power/peripheral cables connected are appropriate for your system configuration. Replace the chassis or system cover, reconnect the chassis to power source, and turn the equipment power on. MVME2500 Installation and Use (6806800L01S)
Page 41: Controls, Leds, And Connectors
Chapter 3 Controls, LEDs, and Connectors Board Layout The following figure shows the components and the connectors on the MVME2500 board. Figure 3-1 Component Layout MVME2500 Installation and Use (6806800L01S)
Page 42: Front Panel
Controls, LEDs, and Connectors Controls, LEDs, and Connectors Front Panel The following components are found on the MVME2500 front panel. Figure 3-2 Front Panel LEDs, Connectors and Switches MVME2500 Installation and Use (6806800L01S)
Page 43: Reset Switch
3.2.1 Reset Switch The MVME2500 has a single push button switch that has both “abort” and “reset” functions. Pressing the switch for less than three seconds generates an abort interrupt to the P20x0 QorIQ PIC. Holding it down for more than three seconds will generate a hard reset. The VME SYSRESET is generated if the MVME2500 is the VMEbus system controller.
Page 44: Table 3-1 Front Panel Leds
Front panel No link GENET2 TSEC2 Integrated Amber 10/100BASE-T operation SPEED Link/Speed RJ-45 LED Green 1000BASE-T operation (Left) No activity Front panel GENET2 TSEC2 Integrated Blinking Green Activity proportional to bandwidth Activity RJ-45 LED utilization MVME2500 Installation and Use (6806800L01S)
Page 45: On-Board Leds
This indicator is lit when the early 3.3V power supply fails. User Defined Amber Controlled by the FPGA User Defined Amber Controlled by the FPGA Connectors This section describes the pin assignments and signals for the connectors on the MVME2500. MVME2500 Installation and Use (6806800L01S)
Page 46: Front Panel Connectors
3.4.1 Front Panel Connectors The following connectors are found on the outside of the MVME2500 board. These connectors are divided between the front panel connectors and the backplane connectors. The front panel connectors include the J1 and the J5 connectors. The backplane connectors include the P1 and the P2 connectors.
Page 47: Front Panel Serial Port (J4)
SMART EC part number SERIAL-MINI-D2 and ACC/CABLE/SER/DTE/6E 9-pin micro-DSUB to 9-pin DSUB cross connected serial console cable. The pin assignments for these connectors are as follows: Table 3-4 Front Panel Serial Port (J4) Signal Description MVME2500 Installation and Use (6806800L01S)
Page 48: Usb Connector (J5)
Controls, LEDs, and Connectors Controls, LEDs, and Connectors 3.4.1.3 USB Connector (J5) The MVME2500 uses upright USB receptacle mounted in the front panel. Table 3-5 USB Connector (J5) Pin Name Signal Description Data - Data + Mounting Ground Mounting Ground...
Page 49: Table 3-6 Vmebus P1 Connector
+3.3V (not used) GND ADD 4 IRQ4 ADD 35 ADD 3 IRQ3 ADD 36 +3.3V (not used) GND ADD 2 IRQ2 ADD 37 ADD 1 IRQ1 ADD 38 +3.3V (not used) GND -12V +12V +12V MVME2500 Installation and Use (6806800L01S)
Page 50: Vmebus P2 Connector
The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the MVME2500 board and to the upper eight VMEbus address lines and additional 16 VMEbus data lines. The Z, A, C, and D pin assignments for the P2 connector are same for both the...
Page 51: On-Board Connectors
On-board Connectors 3.4.2.1 Flash Program Connector (P7) The Flash Program Connector is depopulated in the production version of the MVME2500. However, each pin is exposed for the 60-pin header connector for the JTAG boundary scan. Table 3-8 Flash Programming Header (P7)
Page 52: Sata Connector (J3)
64GBSSDKIT and IVME7210-MNTKIT. Table 3-9 Custom SATA Connector (J3) Signal Description Signal Description SATA POWER ENABLE SATA TX + SATA DETECT SATA TX - +3.3V SATA RX - +3.3V SATA RX + +3.3V +3.3V +3.3V MVME2500 Installation and Use (6806800L01S)
Page 53: Pmc Connectors
3.4.2.3 PMC Connectors The MVME2500 supports only one PMC site. It utilizes J14 to support PMC I/O that goes to the RTM PMC. The tables below show the pinout detail of J11, J12, J13 and J14. See for the location of the PMC connectors.
Page 54: Table 3-11 Pmc J12 Connector
Signal Description Signal Description +12V JTAG TRST IDSELB JTAG TMS TRDY JTAG TDO +3.3V JTAG TDI STOP PERR +3.3V SERR BUSMODE2 (Pulled UP) CBE1 +3.3V PCI RESET AD 14 BUSMODE3 (PULLED DWN) AD 13 +3.3V M66EN MVME2500 Installation and Use (6806800L01S)
Page 55: Table 3-12 Pmc J13 Connector
AD 23 EREADY +3.3V AD 28 RSTOUT AD 18 ACK64 +3.3V AD 16 CBE2 Table 3-12 PMC J13 Connector Signal Description Signal Description AD48 AD 47 CBE7 AD 52 CBE6 AD 45 CBE5 CBE4 +3.3V MVME2500 Installation and Use (6806800L01S)
Page 56 AD 38 AD 59 AD 37 AD 58 AD 57 AD 36 +3.3V AD 35 AD 56 AD 34 AD 55 AD 33 AD 54 AD 53 +3.3V AD 32 AD 51 AD 50 AD 49 MVME2500 Installation and Use (6806800L01S)
Page 57: Table 3-13 Pmc J14 Connector
PMC IO 21 PMC IO 53 PMC IO 22 PMC IO 54 PMC IO 23 PMC IO 55 PMC IO 24 PMC IO 56 PMC IO 25 PMC IO 57 PMC IO 26 PMC IO 58 MVME2500 Installation and Use (6806800L01S)
Page 58: Jtag Connector (P6)
SPI MISO SPI VCC SCAN 1 TCK SCAN 1 TDI SCAN 1 TRST SCAN 1 TDO SCAN 1 TMS +3.3V GPO0 SCAN 2 TMS SCAN 2 TDO SCAN 2 TCK +3.3V FROM +5V SCAN 2 TDI MVME2500 Installation and Use (6806800L01S)
Page 59: Cop Connector (P50)
The COP header is used for the CPU debug. The pin assignment is dictated by NXP and is compatible with the processor’s debugging tool. Table 3-15 COP Header (P50) Signal Description JTAG TDI COP QACK JTAG TDO COP TRST COP RUNSTOP (Pulled UP) COP VDD SENSE MVME2500 Installation and Use (6806800L01S)
Page 60: Sd Connector (J2)
COP HARD RESET KEYING COP CHECK STOP OUT 3.4.2.6 SD Connector (J2) Table 3-16 SD Connector (J2) Signal Description DATA 3 COMMAND VCC (+3.3V) CLOCK DATA 0 DATA 1 DATA 2 WRITE PROTECT CARD DETECT MVME2500 Installation and Use (6806800L01S)
Page 61: Xmc Connector (Xj2)
Controls, LEDs, and Connectors 3.4.2.7 XMC Connector (XJ2) The MVME2500 has one XMC connector (XJ2) that supports XMC cards with J15 connector. It can also support XMC cards with J16 connector without encountering any mechanical interference. Table 3-17 XMC Connector (XJ2) Pinout...
Page 62: Miscellaneous P2020 Debug Connectors
Geographical Address Switch (S1) The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the MVME2500. The switch reflects the inverted states of the geographical address signals. Applications not using the five row backplane can use the geographical address switch to assign a geographical address based on the following diagram.
Page 63: Figure 3-5 Geographical Address Switch
VME SCON SEL switch. 2. The VME SCON SEL switch is OFF to select non-SCON mode. The switch is ON to select always SCON mode. This switch is only effective when the VME SCON MAN switch is ON. MVME2500 Installation and Use (6806800L01S)
Page 64: Smt Configuration Switch (S2)
ON: Flash Block B (Flash Block A) the board will automatically OFF: Flash Block A switch over to the next flash. If both flash banks are corrupted, the board should be sent for repair. MVME2500 Installation and Use (6806800L01S)
Page 65 S2-7 can be set to select the ON: RTM Genet Ethernet will be routed either to the front panel or to the RTM. OFF: Front Panel Should be OFF for normal (CPU Reset CPU Reset operation. Deasserted) MVME2500 Installation and Use (6806800L01S)
Page 66 Controls, LEDs, and Connectors Controls, LEDs, and Connectors MVME2500 Installation and Use (6806800L01S)
Page 67: Functional Description
Chapter 4 Functional Description Block Diagram The MVME2500 block diagram is illustrated in 4-1. All variants provide front panel Figure access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port (one is configurable to be routed to the front panel or to the rear panel) through a ganged RJ-45 connector and one Type A USB port.
Page 68: Chipset
(ECC) ensures very low bit-error rates for reliable high- frequency operation. Though ECC is not implemented on MVME2500, the board includes a place holder for additional chips for ECC whenever it is needed in the future.
Page 69: Pci Express Interface
The SDHC/eSDHC provides an interface between the host system and the memory cards such as the MMC and the SD. It is compatible with the SD Host Controller Standard Specification Ver. 2.0 and supports the following: SD, miniSD, SD Combo, MMC+, and RS-MMC card. MVME2500 Installation and Use (6806800L01S)
Page 70: I2C Interface
Functional Description Functional Description 4.2.6 C Interface The MVME2500 uses only one of the two independent I C buses on the processor. For more information, see I2C Devices on page 4.2.7 USB Interface The P20x0 implements a USB 2.0 compliant serial interface engine. For more information, USB on page 4.2.8...
Page 71: Security Engine (Sec) 3.1
Using 4GB devices allows support of up to 16GB of memory. The MVME2500 has total of eight board variants, half of which has soldered 2GB memory, while the remaining half has 16GB memory. The x8 or 1 Gbit device forms 2GB and 1GB memory capacity.
Page 72: Real Time Clock
FPGA to provide fully programmable registers for the timers. Ethernet Interfaces The MVME2500 has three eTSEC controllers. Each one supports RGII, GMII, and SGMII interface to the external PHY. All controllers can only be utilized when using the RGMII interface. Using the GMII allows only up to two usable controllers.
Page 73: Spi Bus Interface
4.6.1 SPI Flash Memory The MVME2500 has two 8MB on-board serial flash. Both contain the ENV variables and the U-Boot firmware image, which is about 513KB in size. Both SPI flash contain the same programming for firmware redundancy and crisis recovery. The SPI flash is programmed through the JTAG interface or through an on-board SPI flash programming header.
Page 74: Firmware Redundancy
MVME2500 to accommodate this chipset limitation. The MVME2500 FPGA controls the chip select to SPI devices A and B. The FPGA chip select control is based on the Switch Bank (S2-2). Figure 4-2 SPI Device Multiplexing Logic...
Page 75: Crisis Recovery
SPI Device. The MVME2500 supports automatic switch over. If booting one device is not successful, the watchdog will trigger the board reset and it will automatically boot on the other device.
Page 76: Front Uart Control
MVME2500. PMC/XMC Sites The MVME2500 hosts only one PMC/XMC site and accepts either a PMC or an XMC add- on card. Only an XMC or a PMC may be populated at any given time as both occupy the same physical space on the PCB.
Page 77: Pmc Add-On Card
The MVME2500 have a keying pin at the 3.3V location at the PMC site. The MVME2500 boards are not 5 volt PMC IO compatible. The MVME2500 also has a 5 volt keying pin location at the PMC site used to mount the SATA adapter card.
Page 78: Vme Support
4.13 C Devices The MVME2500 utilizes one of the two I2C ports provided by the board's processor. The C bus is a two-wire, serial data (SDA) and serial clock (SCL), synchronous, multi-master bi-directional serial bus that allows data exchange between this device and other devices such as VPD, SPD, EEPROM, RTC, temperature sensor, RTM, XMC, and IDT clocking.
Page 79: Reset/Control Fpga
4.15 Power Management The MVME2500 backplane is utilized to derive +3.3V, +2.5V, +1.8V, +1.5V, +1.2V, +1.05V voltage rail. Each voltage rail is controlled by the FPGA through an enable pin of the regulator, while the output is monitored through power good signal. If a voltage rail fails. the FPGA will disable each supply.
Page 80: Power Up Sequencing Requirements
When the 1.5V is Good, it means that all the DC-DC power is Good. The following figure describes the detailed power up sequence of the board from +5V (main source from backplane) up to the 1.5V Power Good. MVME2500 Installation and Use (6806800L01S)
Page 81: Table 4-2 Power Up Sequence
Functional Description Table 4-2 Power Up Sequence POWER SEQUENCE DIAGRAM DOCUMENT NUMBER 6306822HA.cpm PAGE 83 OF 87 MVME2500 Installation and Use (6806800L01S)
Page 82: Clock Structure
4.17 Reset Structure The MVME2500 reset will initiate after the power up sequence if the 1.5V power supply is GOOD. When the board is at ready state, the reset logic will monitor the reset sources and implement the necessary reset function.
Page 83: Reset Sequence
2. Initialization of Serial Console. 3. Initialization of DDR using SPD parameters in cache. 4. Execution relocation to RAM. 5. Initialization of PCI. 6. POST routine. 7. Additional SW routines. 8. U-boot terminal visibility, ready to load OS image. MVME2500 Installation and Use (6806800L01S)
Page 84: Figure 4-4 Reset Sequence
Functional Description The figure below describes the reset sequence from the +5V Power Good to the release of the CPU reset. Figure 4-4 Reset Sequence RESET SEQUENCE DOCUMENT NUMBER 6306822HA.cpm PAGE 84 OF 87 MVME2500 Installation and Use (6806800L01S)
Page 85: Thermal Management
4.18 Thermal Management The MVME2500 utilizes two on-board temperature sensors: one for the board and the other for the CPU temperature sensor. The board temperature sensor is located near the dual RJ-45 connector near the front panel. The CPU temperature sensor is located near the P2020 CPU.
Page 86: Jtag Chain And Board
4.20.2 JTAG Chain and Board The MVME2500 is designed to work with separate JTAG board rather than with an on- board JTAG multiplexer. The chip can support up to a 6-scan port and the board’s boundary scan requires the following to function: ASSET hardware, JTAG board, and JTAG cable.
Page 87: Table 4-5 Transition Module Features
The MVME721X RTM is for I/O routing through the rear of a compact VMEbus chassis. It connects directly to the VME backplane in chassis with an 80 mm deep rear transition area. The MVME721X RTM is designed for use with the MVME7100, MVME2500, and MVME4100. It has the following features:...
Page 88 Functional Description Functional Description MVME2500 Installation and Use (6806800L01S)
Page 89: Memory Maps And Registers
Memory Maps and Registers Overview System resources including system control and status registers, external timers, and the QUART are mapped into 16MB address range accessible from the MVME2500 local bus through the P20x0 QorIQ LBC. Memory Map The following table shows the physical address map of the MVME2500.
Page 90: Flash Memory Map
PCIE1 IO 0xffc20000 0xffc2ffff 64KB QUART0 0xffc40000 0xffc4ffff 64KB QUART1 0xffc50000 0xffc5ffff 64KB QUART2 0xffc60000 0xffc6ffff 64KB QUART3 0xffc70000 0xffc7ffff 64KB Timer 0xffc80000 0xffc8ffff 64KB FPGA 0xffdf0000 0xffdf0fff ecm local access window CCSR 0xffe00000 0xffe00ffff MVME2500 Installation and Use (6806800L01S)
Page 91: Table 5-3 Linux Devices Memory Map
0xffe25000 0xffe25fff ETSEC3 CCSR 0xffe26000 0xffe26fff SDHCI CCSR 0xffe2e000 0xffe2efff Crypto CCSR 0xffe30000 0xffe3ffff 64KB msi CCSR 0xffe41600 0xffe4167f 128B mpic CCSR 0xffe40000 0xffe7ffff 256KB Global Utilities CCSR 0xffee0000 0xffee0fff L2 Cache Mem 0xf0f80000 0xf0ffffff 512KB MVME2500 Installation and Use (6806800L01S)
Page 92: Programmable Logic Device (Pld) Registers
Memory Maps and Registers Programmable Logic Device (PLD) Registers 5.5.1 PLD Revision Register The MVME2500 provides a PLD revision register that is read by the system software to determine the current version of the timers/registers PLD. Table 5-4 PLD Revision Register...
Page 93: Pld Month Register
Memory Maps and Registers 5.5.3 PLD Month Register The MVME2500 PLD provides an 8-bit register which contains the build month of the timers/registers PLD. Table 5-6 PLD Month Register PLD Year Register - 0xFFDF0005 Field PLD Rev OPER RESET 5.5.4...
Page 94: Pld Power Good Monitor Register
Memory Maps and Registers Memory Maps and Registers 5.5.6 PLD Power Good Monitor Register The MVME2500 PLD provides an 8-bit register which indicates the instantaneous status of the supply’s power good signals. Table 5-9 PLD Power Good Monitor Register PLD PWRDG_MNTR - 0xFFDF0012...
Page 95: Pld Pci/Pmc/Xmc Monitor Register
Front Panel LEDs on page 44 On-board LEDs Status on page 5.5.8 PLD PCI/PMC/XMC Monitor Register The MVME2500 PLD provides an 8-bit register which indicates the status of the PCI/PMC/XMC interface signals. Table 5-11 PLD PCI/PMC/XMC Monitor Register PLD PCI_PMC_XMC_MNTR - 0xFFDF001D...
Page 96: Pld U-Boot And Tsi Monitor Register
Memory Maps and Registers 5.5.9 PLD U-Boot and TSI Monitor Register The MVME2500 PLD provides an 8-bit register which indicates the status of the U-Boot's normal environment switch and TSI interface signals. Table 5-12 PLD U-Boot and TSI Monitor Register...
Page 97: Pld Write Protect And I C Debug Register
PLD Write Protect and I C Debug Register The MVME2500 PLD provides an 8-bit register which is used to indicate the status of I and SPI write-protect manual switches and is used to control the SPI write-enable.The I debug ports are also provided in this register which is used in controlling the bus’ status.
Page 98: Pld Test Register 1
AND connection between the two ports. 5.5.12 PLD Test Register 1 The MVME2500 PLD provides an 8-bit general purpose read/write register which is used by the software for PLD testing or general status bit storage. Table 5-15 PLD Test Register 1...
Page 99: Pld Test Register 2
5.5.14 PLD GPIO2 Interrupt Register The Abort switch, Tick Timer 0, 1 and 2 interrupts are ORed together. The MVME2500 provides an interrupt register that the system software reads to determine which device the interrupt originated from. GPIO2 will be driven Low if any of the interrupts asserts.
Page 100: Pld Shutdown, Reset Control And Reset Reason Register
5.5.15 PLD Shutdown, Reset Control and Reset Reason Register The MVME2500 provides an 8-bit register to execute the shutdown and reset commands. The board's reset reason is also included in this register. Table 5-18 PLD Shutdown, Reset Control and Reset Reason Register...
Page 101: Pld Watchdog Timer Refresh Register
0 - None 5.5.16 PLD Watchdog Timer Refresh Register The MVME2500 provides a watchdog timer refresh register. Table 5-19 PLD Watchdog Timer Refresh Register PLD Watch Dog Timer Load - 0xFFC80600 7 6 5 4 3 2 1 0...
Page 102: Pld Watchdog Control Register
Enable. If cleared, the watchdog timer is disabled. If set, the watchdog timer is enabled. 5.5.18 PLD Watchdog Timer Count Register The MVME2500 provides a watchdog timer count register. Table 5-21 PLD Watchdog Timer Count Register PLD Watchdog Timer Count - 0xffc80606...
Page 103: External Timer Registers
Memory Maps and Registers External Timer Registers The MVME2500 provides a set of tick timer registers to access the three external timers implemented in the timers/registers PLD. These registers are 32-bit and are word writable. The following sections describe the timer prescaler and control registers: 5.6.1...
Page 104: Control Registers
If the counter does not initially start at zero, the time to the first interrupt may be longer or shorter than expected. Note that the rollover time for the counter is 71.6 minutes. MVME2500 Installation and Use (6806800L01S)
Page 105: Counter High And Low Word Registers
Tick Timer 0 Counter Value High Word - 0xFFC80208 Tick Timer 1 Counter Value High Word - 0xFFC80308 Tick Timer 2 Counter Value High Word - 0xFFC80408 Field TickTimer Counter Value High Word (16-bits) OPER RESET 0x0000 MVME2500 Installation and Use (6806800L01S)
Page 106: Table 5-27 Counter Low Word Registers
Tick Timer 0 Counter Value Low Word - 0xFFC8020A Tick Timer 1 Counter Value Low Word - 0xFFC8030A Tick Timer 2 Counter Value Low Word - 0xFFC8040A Field TickTimer Counter Value Low Word (16-bits) OPER RESET 0x0000 MVME2500 Installation and Use (6806800L01S)
Page 107: Boot System
Chapter 6 Boot System Overview The MVME2500 uses Das U-Boot, a boot loader software based on the GNU Public License. It boots the blade and is the first software to be executed after the system is powered on. Its main functions are: Initialize the hardware ...
Page 108: Boot Options
1. Make sure that the kernel, dtb, and ramdisk are accessible to the board from the TFTP server. 2. Configure U-Boot environment variables: setenv ipaddr <IP address of MVME2500> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP>...
Page 109: Booting From An Optional Sata Drive
# option: usb - interface, 0:1 - device 0 partition 1 fatload usb 0:1 1000000 $File_uImage fatload usb 0:1 2000000 $File_ramdisk fatload usb 0:1 c00000 $File_dtb 5. Boot the Linux in memory: bootm 1000000 2000000 c00000 MVME2500 Installation and Use (6806800L01S)
Page 110: Booting From An Sd Card
In this mode, the U-Boot downloads and boots VxWorks from an external TFTP server. 1. Make sure that the VxWorks image is accessible by the board from the TFTP server. 2. Configure U-Boot environment variables: setenv ipaddr <IP address of MVME2500> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP>...
Page 111: Using The Persistent Memory Feature
U-Boot reports less memory to the Linux kernel through the mem parameter, indicating that the operating system should not use it either. For more information, see the U-Boot documentation. MVME2500 Installation and Use (6806800L01S)
Page 112: Mvme2500 Specific U-Boot Commands
Print information about file system fatinfo Load binary file from a DOS file system fatload List files in a directory (default /) fatls Flattened device tree utility commands Start application at address 'addr' Print online help help MVME2500 Installation and Use (6806800L01S)
Page 113 Boot System Table 6-1 MVME2500 Specific U-Boot Commands (continued) Command Description I2C sub-system Print header information for application image iminfo Extract a part of a multi-image imxtract Enable or disable interrupts interrupts Return true/false on integer compare itest Load binary file over serial line (kermit mode)
Page 114: Updating U-Boot
Boot System Boot System Table 6-1 MVME2500 Specific U-Boot Commands (continued) Command Description Run commands in an environment variable Save environment variables to persistent storage saveenv Run a ';' delimited, ';;' terminated list of commands script SCSI sub-system scsi Boot from SCSI device...
Page 115 5. Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0: sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1, replace step 2 with Select SPI flash # 1: sf probe 1 MVME2500 Installation and Use (6806800L01S)
Page 116 Boot System Boot System MVME2500 Installation and Use (6806800L01S)
Page 117: Programming Model
Overview This chapter includes additional programming information for the MVME2500. Reset Configuration The MVME2500 supports the power-on reset (POR) pin sampling method for processor reset configuration. Each option and the corresponding default setting are described in the following table. Table 7-1...
Page 118 Speed configuration CFG_CORE0_SPEED: For 800MHz board 0=CORE FREQ<=1000 configuration CFG_CORE1_SPEED: CORE 1 For 1200MHz board LA26 1=CORE FREQ>=1000 Speed configuration CFG_CORE1_SPEED: For 800MHz board 0=CORE FREQ<=1000 configuration CFG_DDR_SPEED:1= Controller LA26 DDR FREQ>= 500 MHz Speed MVME2500 Installation and Use (6806800L01S)
Page 119 SGMII mode. The eTSEC2 controller operates using the GMII protocol (or RGMII, if ETSEC2 TSEC2_TXD0, configured in reduced Protocol TSEC2_TXD7 mode) if its not configured to operate in SGMII mode. MVME2500 Installation and Use (6806800L01S)
Page 120 Time Out TRIG_OUT indefinitely for the Enable SerDes PLL to lock (default). System SYSCLOCK is above 66 LA[28] Speed SDHC Card Detect TSEC2_TXD_5 Not Inverted Polarity RAPID System Default RapidIO is not used Size MVME2500 Installation and Use (6806800L01S)
Page 121: Interrupt Controller
Programming Model Interrupt Controller The MVME2500 uses the MPC8548E integrated programmable interrupt controller (PIC) to manage locally generated interrupts. Currently defined external interrupting devices and interrupt assignments, along with corresponding edge/levels and polarities, are shown in the following table. Table 7-2...
Page 122: I 2 C Bus Device Addressing
Programming Model Programming Model C Bus Device Addressing The following table contains the I C devices used for the MVME2500 and its assigned device address. Table 7-3 C Bus Device Addressing C Bus Address Device Function Size Notes 0x50 256 x 8...
Page 123: Other Software Considerations
7.6.3 Quad UART The MVME2500 console RS-232 port is driven by the UART built into the P20x0 QorIQ chip. Additionally, the MVME2500 has a Quad UART chip which provides four 16550 compatible UART. These additional UARTs are internally accessed through the LBC bus.
Page 124: Lbc Timing Parameters
Extended hold time on read accesses 0 - The memory controller generates normal timing. No additional cycles are inserted External address latch delay 0 - No additional bus clock cycles (LALE asserted for one bus clock cycle only) MVME2500 Installation and Use (6806800L01S)
Page 125: Clock Distribution
P2020 clocks are generated by ICS840S07I device. Additional clocks required by individual devices are generated near the devices using individual oscillators. The following table lists the clocks required on the MVME2500 along with the frequency and source. Table 7-6 Clock Distribution...
Page 126: System Clock
7.7.3 Local Bus Controller Clock Divisor The local bus controller (LBC) clock output is connected to the FPGA for LBC bus transaction. It is also the source of 1 MHz (CPU_RTC) and FPGA tick timers. MVME2500 Installation and Use (6806800L01S)
Page 127: Replacing The Battery
Appendix A Replacing the Battery Replacing the Battery The figure below shows the location of the board battery. Figure A-1 Battery Location MVME2500 Installation and Use (6806800L01S)
Page 128 To replace the battery, proceed as follows: 1. Remove the old battery. 2. Install the new battery with the plus sign (+) facing up. 3. Dispose of the old battery according to your country’s legislation and in an environmentally safe way. MVME2500 Installation and Use (6806800L01S)
Page 129: Related Documentation
Table B-2 Manufacturers’ Publications Company Document NXP Corporation, QorIQ™ P2020 Integrated Processor Reference Manual, NXP Corporation Rev. 0 Integrated Device Tsi148™ PCI/X-to-VME Bus Bridge User Manual, March 2009 Technology MVME2500 Installation and Use (6806800L01S)
Page 130: Related Specifications
PCI Local Bus Specification PCI Rev 3.0 Interconnect Special Interest Group PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Specification (PCI-X EM) Revision 2.0a (PCI-SIG) PCI-X Protocol Addendum to the PCI Local Bus Specification (PCI-X PT) Revision 2.0a MVME2500 Installation and Use (6806800L01S)
Page 131 (SATA-IO) Serial ATA II: Extensions to Serial ATA 1.0 Revision 1.0 Trusted Computing TPM Specification 1.2, Level 2 Revision 103 Version 1.2 Group (TCG) USB Implementers Universal Serial Bus Specification (USB) Revision 2.0 Forum (USB-IF) MVME2500 Installation and Use (6806800L01S)
Page 132 Related Documentation Related Documentation MVME2500 Installation and Use (6806800L01S)
Page 134 © 2021 SMART Embedded Computing™, Inc. All rights reserved. The stylized “S” and “SMART” is a registered trademark of SMART Modular Technologies, Inc. and “SMART Embedded Computing” and the SMART Embedded Computing logo are trademarks of SMART Modular Technologies, Inc. All other names and logos...

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