Figure 1-8 Example Reset Circuit - ARM DSTREAM-PT Reference Manual

System and interface design
Table of Contents

Advertisement

The push-button, 100R resistor, and 100nF capacitor shown here are an example of how a manual reset
button can be interfaced with the nSRST signal. This is optional and would typically be used on
development boards.
The reset device that is shown here would keep the target device, and any other system devices, in their
reset state until the power rail has reached a minimum valid voltage. If the target device has a separate
Power On Reset (POR) input, any voltage monitoring devices would typically connect to that instead. If
the target device is equipped with internal voltage monitoring circuitry, external monitoring devices can
be omitted.
101714_0100_02_en
nTRST
Debug
Connector
nSRST
Copyright © 2019 Arm Limited or its affiliates. All rights reserved.
Non-Confidential
VDD
10K
TAP RESET
e.g. STM1001
VDD
10K
SYSTEM RESET
100R
100nF
Manual
Reset
1 Debug and trace interface
1.3 Reset signals
nTRST
Open-drain
reset device
VDD
Target
Device
nRST
nRESET

Figure 1-8 Example reset circuit

Other
Devices
1-20

Advertisement

Table of Contents
loading

Table of Contents