ARM DSTREAM-PT Reference Manual page 46

System and interface design
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1. Although these pins are typically grounded on the target board, the MIPI specification also allows
them to carry power. If they are connected to power rail (or rails) on the target board, these pins must
also be AC coupled to GND using 100nF capacitors that are close to the connector.
2. The TRST_PD signal allows the target board to have a second TAP reset signal which is normally
pulled-down. For more information, see the MIPI debug connector specification.
3. The TRACEEXT signal is not supported by DSTREAM-ST.
Pin 7 must be removed for compatibility with DSTREAM-ST and MIPI specifications.
Using a non-shrouded header on the target board can lead to short-circuits or signal contention. To ensure
the correct polarity and position, Arm recommends that you use a fully shrouded box header.
101714_0100_02_en
Note
Note
Warning
Copyright © 2019 Arm Limited or its affiliates. All rights reserved.
Table 2-9 MIPI 34 pinout table (continued)
Pin Signal name
13
15
17
19
21
23
25
27
29
31
33
Non-Confidential
2 Target interface connectors
2.8 MIPI 34 connector
Pin Signal name
GND (1)
14
TRST_PD (2)
GND
16
nTRST
GND
18
DBGRQ
GND
20
DBGACK
GND
22
TRACECLK
GND
24
TRACEDATA[0]
GND
26
TRACEDATA[1]
GND
28
TRACEDATA[2]
GND
30
TRACEDATA[3]
GND
32
TRACEEXT (3)
GND
34
TRACE_VTREF
2-46

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