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The target:
•
Writes data to SWDIO on the rising edge of SWCLK.
•
Reads data from SWDIO on the rising edge of SWCLK.
The following table shows the timing requirements for SWD:
101714_0100_02_en
Parameter Min Max Description
T[high]
4ns
50ms SWCLKHIGH period.
T[low]
4ns
50ms SWCLKLOW period.
T[os]
-1ns 1ns
SWDIO output skew to falling edge SWCLK.
T[is]
4ns
-
Input setup time that is required between SWDIO and rising edge SWCLK.
T[ih]
1ns
-
Input hold time that is required between SWDIO and rising edge SWCLK.
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1 Debug and trace interface
1.5 Serial Wire Debug (SWD) signals
Table 1-2 SWD timing requirements
1-23
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