Typical Jtag Circuit; Figure 1-18 Typical Jtag Circuit - ARM DSTREAM-PT Reference Manual

1.10

Typical JTAG circuit

A typical JTAG circuit:
To improve signal integrity, it is good practice to provide an impedance matching resistor on the TDO
and RTCK outputs of the processor. The value of these resistors, added to the impedance of the driver,
must be approximately equal to 50Ω.
101714_0100_02_en
Debug
Connector
VTREF
TDI
TMS
TCK
TDO
RTCK
nTRST
nSRST
GND
Note
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VDD
10K 10K
10K
Non-Confidential
1 Debug and trace interface
1.10 Typical JTAG circuit
10K 10K 10K
TDI
TMS
TCK
TDO
22R
RTCK
22R
nTRST
nRESET
10K

Figure 1-18 Typical JTAG circuit

Target
Device
1-31